Quoting Michel Thierry (2018-01-25 17:49:49) > On 1/25/2018 3:24 AM, Chris Wilson wrote: > > CTX_CONTEXT_CONTROL (CTX_SR_CTL) operates as a masked register and so > > will only apply the bits that are selected by the upper half. In the > > case of selectively enabling sr inhibit, this may mean the context keeps > > the current setting (so forgetting to save the context later, eventually > > leading to a very upset GPU!). > > Oops, true no one would clear Context Save Inhibit once it's set. > > > > > Fixes: d2b4b97933f5 ("drm/i915: Record the default hw state after reset upon load") > Does it really fixes this one ^^^? It's a stretch, I don't have an observed bug, but I felt it was sensible for completeness. > Restore Inhibit has this note: "This is not a true register bit.... This > bit will always be in clear state on a context save of this bit". Maybe > that's why didn't see any problems. But it doesn't hurt being paranoid. Paranoid is my middle name. Well it would be if the HW wasn't out to get me. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx