Re: [PATCH] drm/i915/cnp: Properly handle VBT ddc pin out of bounds.

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On Thu, 25 Jan 2018, Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> wrote:
> If the table result is out of bounds on the array map
> there is something really wrong with VBT pin so we don't
> return that vbt_pin, but only return 0 instead.
>
> This basically reverts commit 'a8e6f3888b05 ("drm/i915/cnp:
> Ignore VBT request for know invalid DDC pin.")'
>
> Also this properly fixes commit 9c3b2689d01f ("drm/i915/cnl:
> Map VBT DDC Pin to BSpec DDC Pin.")
>
> v2: Do in a way that we don't break other platforms. (Jani)
> v3: Keep debug message (Jani)
>
> Fixes: a8e6f3888b05 ("drm/i915/cnp: Ignore VBT request for know invalid DDC pin.")
> Fixes: 9c3b2689d01f ("drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.")
> Cc: Radhakrishna Sripada <radhakrishna.sripada@xxxxxxxxx>
> Cc: Jani Nikula <jani.nikula@xxxxxxxxx>
> Cc: Kai Heng Feng <kai.heng.feng@xxxxxxxxxxxxx>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> ---
>  drivers/gpu/drm/i915/intel_bios.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index 95f0b310d656..06526b17a011 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1116,9 +1116,9 @@ static const u8 cnp_ddc_pin_map[] = {
>  static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
>  {
>  	if (HAS_PCH_CNP(dev_priv)) {
> -		if (vbt_pin > 0 && vbt_pin < ARRAY_SIZE(cnp_ddc_pin_map))
> +		if (vbt_pin > 0 && vbt_pin < ARRAY_SIZE(cnp_ddc_pin_map)) {
>  			return cnp_ddc_pin_map[vbt_pin];
> -		if (vbt_pin > GMBUS_PIN_4_CNP) {
> +		} else {

You're going to hate me, but I just realized this will now complain
about vbt_pin == 0, which I guess is valid for N/A.

Why are simple things so hard sometimes... :(

else if (vbt_pin) ?

BR,
Jani.


>  			DRM_DEBUG_KMS("Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", vbt_pin);
>  			return 0;
>  		}

-- 
Jani Nikula, Intel Open Source Technology Center
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