On Fri, 2018-01-19 at 16:05 -0800, Rodrigo Vivi wrote:
> Now let's finish the Port-F support by adding the
> proper port F detection, irq and power well support.
>
> v2: Rebase
> v3: Use BIT_ULL
> v4: Cover missed case on ddi init.
> v5: Update commit message.
> v6: Rebase on top of display headers rework.
>
> Cc: Manasi Navare <manasi.d.navare@xxxxxxxxx>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 ++
> drivers/gpu/drm/i915/intel_ddi.c | 4 ++++
> drivers/gpu/drm/i915/intel_display.c | 6 +++++-
> drivers/gpu/drm/i915/intel_display.h | 2 ++
> drivers/gpu/drm/i915/intel_runtime_pm.c | 13 +++++++++++++
> 5 files changed, 26 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 861a7d5a27af..32ec64eb2c5a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1304,6 +1304,7 @@ enum i915_power_well_id {
> SKL_DISP_PW_DDI_B,
> SKL_DISP_PW_DDI_C,
> SKL_DISP_PW_DDI_D,
This looks suspicious, why isn't there a DDI_E here for CNL? I see that
bit 10 and 11 correspond to CNL port E in the spec.
> + CNL_DISP_PW_DDI_F = 6,
>
> GLK_DISP_PW_AUX_A = 8,
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