From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> We add a PMU counter to expose the number of requests currently executing on the GPU. This is useful to analyze the overall load of the system. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_pmu.c | 14 ++++++++++++-- drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +- include/uapi/drm/i915_drm.h | 5 +++++ 3 files changed, 18 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c index d6d08cca2bc8..93b86bc44c51 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c @@ -38,7 +38,8 @@ BIT(I915_SAMPLE_WAIT) | \ BIT(I915_SAMPLE_SEMA) | \ BIT(I915_SAMPLE_QUEUED) | \ - BIT(I915_SAMPLE_SUBMITTED)) + BIT(I915_SAMPLE_SUBMITTED) | \ + BIT(I915_SAMPLE_RUNNING)) #define ENGINE_SAMPLE_BITS (1 << I915_PMU_SAMPLE_BITS) @@ -232,6 +233,11 @@ static void engines_sample(struct drm_i915_private *dev_priv) update_sample(&engine->pmu.sample[I915_SAMPLE_SUBMITTED], 1 / I915_SAMPLE_SUBMITTED_SCALE, atomic_read(&engine->submitted)); + + if (engine->pmu.enable & BIT(I915_SAMPLE_RUNNING)) + update_sample(&engine->pmu.sample[I915_SAMPLE_RUNNING], + 1 / I915_SAMPLE_RUNNING_SCALE, + last_seqno - current_seqno); } if (fw) @@ -311,6 +317,7 @@ engine_event_status(struct intel_engine_cs *engine, case I915_SAMPLE_WAIT: case I915_SAMPLE_QUEUED: case I915_SAMPLE_SUBMITTED: + case I915_SAMPLE_RUNNING: break; case I915_SAMPLE_SEMA: if (INTEL_GEN(engine->i915) < 6) @@ -423,7 +430,8 @@ static u64 __i915_pmu_event_read(struct perf_event *event) } if (sample == I915_SAMPLE_QUEUED || - sample == I915_SAMPLE_SUBMITTED) + sample == I915_SAMPLE_SUBMITTED || + sample == I915_SAMPLE_RUNNING) val = div_u64(val, FREQUENCY); } else { switch (event->attr.config) { @@ -800,6 +808,8 @@ create_event_attributes(struct drm_i915_private *i915) __stringify(I915_SAMPLE_QUEUED_SCALE)), __engine_event_scale(I915_SAMPLE_SUBMITTED, "submitted", __stringify(I915_SAMPLE_SUBMITTED_SCALE)), + __engine_event_scale(I915_SAMPLE_RUNNING, "running", + __stringify(I915_SAMPLE_RUNNING_SCALE)), }; unsigned int count = 0; struct perf_pmu_events_attr *pmu_attr = NULL, *pmu_iter; diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 01355fc24d1e..b198df1f248c 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -379,7 +379,7 @@ struct intel_engine_cs { * * Our internal timer stores the current counters in this field. */ -#define I915_ENGINE_SAMPLE_MAX (I915_SAMPLE_SUBMITTED + 1) +#define I915_ENGINE_SAMPLE_MAX (I915_SAMPLE_RUNNING + 1) struct i915_pmu_sample sample[I915_ENGINE_SAMPLE_MAX]; /** * @busy_stats: Has enablement of engine stats tracking been diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 3285027a6ce0..c3b98fb8b691 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -113,10 +113,12 @@ enum drm_i915_pmu_engine_sample { I915_SAMPLE_SEMA = 2, I915_SAMPLE_QUEUED = 3, I915_SAMPLE_SUBMITTED = 4, + I915_SAMPLE_RUNNING = 5, }; #define I915_SAMPLE_QUEUED_SCALE 1e-2 /* No braces please. */ #define I915_SAMPLE_SUBMITTED_SCALE 1e-2 /* No braces please. */ +#define I915_SAMPLE_RUNNING_SCALE 1e-2 /* No braces please. */ #define I915_PMU_SAMPLE_BITS (4) #define I915_PMU_SAMPLE_MASK (0xf) @@ -144,6 +146,9 @@ enum drm_i915_pmu_engine_sample { #define I915_PMU_ENGINE_SUBMITTED(class, instance) \ __I915_PMU_ENGINE(class, instance, I915_SAMPLE_SUBMITTED) +#define I915_PMU_ENGINE_RUNNING(class, instance) \ + __I915_PMU_ENGINE(class, instance, I915_SAMPLE_RUNNING) + #define __I915_PMU_OTHER(x) (__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x)) #define I915_PMU_ACTUAL_FREQUENCY __I915_PMU_OTHER(0) -- 2.14.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx