Second stage of HDCP authentication starts at CP_IRQ or at the
assertion of READY bit from Repeater.
Till then repeater will be authenticating with its downstream devices.
So authenticated device count, depth and ksv_list readable from
repeaters are valid only after assertion of READY/CP_IRQ.
This patch makes sure that READY is polled before reading any
topology information.
Signed-off-by: Ramalingam C <ramalingam.c@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_hdcp.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_hdcp.c b/drivers/gpu/drm/i915/intel_hdcp.c
index b48c72cd0906..292c98fc8e72 100644
--- a/drivers/gpu/drm/i915/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/intel_hdcp.c
@@ -150,6 +150,12 @@ int intel_hdcp_auth_downstream(struct intel_digital_port *intel_dig_port,
dev_priv = intel_dig_port->base.base.dev->dev_private;
+ ret = intel_hdcp_poll_ksv_fifo(intel_dig_port, shim);
+ if (ret) {
+ DRM_ERROR("KSV list failed to become ready (%d)\n", ret);
+ return ret;
+ }
+
ret = shim->read_bstatus(intel_dig_port, bstatus);
if (ret)
return ret;
@@ -161,12 +167,6 @@ int intel_hdcp_auth_downstream(struct intel_digital_port *intel_dig_port,
return 0;
}
- ret = intel_hdcp_poll_ksv_fifo(intel_dig_port, shim);
- if (ret) {
- DRM_ERROR("KSV list failed to become ready (%d)\n", ret);
- return ret;
- }
-
ksv_fifo = kzalloc(num_downstream * DRM_HDCP_KSV_LEN, GFP_KERNEL);
if (!ksv_fifo)
return -ENOMEM;
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
