On Wed, 2018-01-03 at 20:57 +0000, Chris Wilson wrote: > Quoting Dhinakaran Pandiyan (2018-01-03 20:39:59) > > Since we want to allow for a non-blocking power domain for vblanks, > > the power domain use count and power well use count will not be updated > > atomically inside the power domain mutex (see next patch). This affects > > verifying if sum(power_domain_use_count) == power_well_use_count at > > init time. So do not enable vblanks until this verification is done. > > > > Cc: Daniel Vetter <daniel.vetter@xxxxxxxx> > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > > Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_display.c | 24 ++++++++++++++++++++---- > > 1 file changed, 20 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > > index 0cd355978ab4..7bc874b8dac7 100644 > > --- a/drivers/gpu/drm/i915/intel_display.c > > +++ b/drivers/gpu/drm/i915/intel_display.c > > @@ -14739,6 +14739,24 @@ static bool has_pch_trancoder(struct drm_i915_private *dev_priv, > > (HAS_PCH_LPT_H(dev_priv) && pch_transcoder == PIPE_A); > > } > > > > +static void modeset_enable_vblanks(struct drm_i915_private *dev_priv) > > +{ > > + enum pipe pipe; > > + > > + for_each_pipe(dev_priv, pipe) { > > for_each_intel_crtc() > -Chris Thanks for you comments, I'll fix them up in the next version if the overall approach (disabling DC off) is Acked. -DK > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx