Quoting Tvrtko Ursulin (2017-12-22 13:13:47) > From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > > Support creating spin batches which return an output fence using new > __igt_spin_batch_new_fence / igt_spin_batch_new_fence API. > > This will be used fromthe perf_pmu@interrupts test to ensure user > interrupt generation from a batch with controlled duration. > > v2: Support out fence with multiple engines as well. (Chris Wilson) > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> (v1) > --- > lib/igt_dummyload.c | 80 +++++++++++++++++++++++++++++++++++++++++++++++------ > lib/igt_dummyload.h | 10 +++++++ > 2 files changed, 82 insertions(+), 8 deletions(-) > > diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c > index d19b4e5ea3d2..27eb402bb699 100644 > --- a/lib/igt_dummyload.c > +++ b/lib/igt_dummyload.c > @@ -34,6 +34,7 @@ > #include "intel_chipset.h" > #include "intel_reg.h" > #include "ioctl_wrappers.h" > +#include "sw_sync.h" > > /** > * SECTION:igt_dummyload > @@ -70,9 +71,9 @@ fill_reloc(struct drm_i915_gem_relocation_entry *reloc, > reloc->write_domain = write_domains; > } > > -static void emit_recursive_batch(igt_spin_t *spin, > - int fd, uint32_t ctx, unsigned engine, > - uint32_t dep) > +static int emit_recursive_batch(igt_spin_t *spin, > + int fd, uint32_t ctx, unsigned engine, > + uint32_t dep, bool out_fence) > { > #define SCRATCH 0 > #define BATCH 1 > @@ -82,6 +83,7 @@ static void emit_recursive_batch(igt_spin_t *spin, > struct drm_i915_gem_execbuffer2 execbuf; > unsigned int engines[16]; > unsigned int nengine; > + int fence_fd = -1; > uint32_t *batch; > int i; > > @@ -165,22 +167,44 @@ static void emit_recursive_batch(igt_spin_t *spin, > execbuf.buffers_ptr = to_user_pointer(obj + (2 - execbuf.buffer_count)); > execbuf.rsvd1 = ctx; > > + if (out_fence) > + execbuf.flags |= I915_EXEC_FENCE_OUT; > + > for (i = 0; i < nengine; i++) { > execbuf.flags &= ~ENGINE_MASK; > - execbuf.flags = engines[i]; > - gem_execbuf(fd, &execbuf); > + execbuf.flags |= engines[i]; > + gem_execbuf_wr(fd, &execbuf); > + if (out_fence) { > + int _fd = execbuf.rsvd2 >> 32; > + > + igt_assert(_fd >= 0); > + if (fence_fd == -1) { > + fence_fd = _fd; > + } else { > + int old_fd = fence_fd; > + > + fence_fd = sync_fence_merge(old_fd, _fd); > + close(old_fd); > + close(_fd); > + } > + igt_assert(fence_fd >= 0); At some point we will write sync_fence_accumulate that does all of the above: fence_fd = sync_fence_accumulate(fence_fd, _fd);. Looks correct, the only thing I would nitpick is spin->out_fence; at that point it is just the fence representing the spinner, and spin->fence is descriptive and accurate. Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx