On Tue, 2017-12-19 at 14:01 -0800, Rodrigo Vivi wrote:
> On Tue, Dec 12, 2017 at 09:52:09PM +0000, Dhinakaran Pandiyan wrote:
> > The POWER_DOMAIN_INIT bit is already set in _POWERWELL_2_POWER_DOMAINS,
> > which is included in _DC_OFF_POWER_DOMAINS. So, avoid setting that again
> > in _DC_OFF_POWER_DOMAINS and shuffle the macros a bit to make it easy to
> > notice relation.
> >
> > Cc: Imre Deak <imre.deak@xxxxxxxxx>
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/intel_runtime_pm.c | 20 ++++++++------------
> > 1 file changed, 8 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 96ab74f3d101..eb4b12989c84 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -1706,11 +1706,10 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> > BIT_ULL(POWER_DOMAIN_PORT_DDI_D_IO) | \
> > BIT_ULL(POWER_DOMAIN_INIT))
> > #define SKL_DISPLAY_DC_OFF_POWER_DOMAINS ( \
> > - SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS | \
> > BIT_ULL(POWER_DOMAIN_GT_IRQ) | \
> > BIT_ULL(POWER_DOMAIN_MODESET) | \
> > BIT_ULL(POWER_DOMAIN_AUX_A) | \
> > - BIT_ULL(POWER_DOMAIN_INIT))
> > + SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS)
> >
> > #define BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS ( \
> > BIT_ULL(POWER_DOMAIN_TRANSCODER_A) | \
> > @@ -1728,12 +1727,6 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> > BIT_ULL(POWER_DOMAIN_VGA) | \
> > BIT_ULL(POWER_DOMAIN_GMBUS) | \
> > BIT_ULL(POWER_DOMAIN_INIT))
> > -#define BXT_DISPLAY_DC_OFF_POWER_DOMAINS ( \
> > - BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS | \
> > - BIT_ULL(POWER_DOMAIN_GT_IRQ) | \
> > - BIT_ULL(POWER_DOMAIN_MODESET) | \
> > - BIT_ULL(POWER_DOMAIN_AUX_A) | \
> > - BIT_ULL(POWER_DOMAIN_INIT))
> > #define BXT_DPIO_CMN_A_POWER_DOMAINS ( \
> > BIT_ULL(POWER_DOMAIN_PORT_DDI_A_LANES) | \
> > BIT_ULL(POWER_DOMAIN_AUX_A) | \
> > @@ -1744,6 +1737,11 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> > BIT_ULL(POWER_DOMAIN_AUX_B) | \
> > BIT_ULL(POWER_DOMAIN_AUX_C) | \
> > BIT_ULL(POWER_DOMAIN_INIT))
> > +#define BXT_DISPLAY_DC_OFF_POWER_DOMAINS ( \
> > + BIT_ULL(POWER_DOMAIN_GT_IRQ) | \
> > + BIT_ULL(POWER_DOMAIN_MODESET) | \
> > + BIT_ULL(POWER_DOMAIN_AUX_A) | \
> > + BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS)
>
> why did you move the entire block below?
>
Because the DC_OFF domain is at the bottom for every other platform :)
> >
> > #define GLK_DISPLAY_POWERWELL_2_POWER_DOMAINS ( \
> > BIT_ULL(POWER_DOMAIN_TRANSCODER_A) | \
> > @@ -1788,11 +1786,10 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> > BIT_ULL(POWER_DOMAIN_AUX_C) | \
> > BIT_ULL(POWER_DOMAIN_INIT))
> > #define GLK_DISPLAY_DC_OFF_POWER_DOMAINS ( \
> > - GLK_DISPLAY_POWERWELL_2_POWER_DOMAINS | \
> > BIT_ULL(POWER_DOMAIN_GT_IRQ) | \
> > BIT_ULL(POWER_DOMAIN_MODESET) | \
> > BIT_ULL(POWER_DOMAIN_AUX_A) | \
> > - BIT_ULL(POWER_DOMAIN_INIT))
> > + GLK_DISPLAY_POWERWELL_2_POWER_DOMAINS)
> >
> > #define CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS ( \
> > BIT_ULL(POWER_DOMAIN_TRANSCODER_A) | \
> > @@ -1836,10 +1833,9 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
> > BIT_ULL(POWER_DOMAIN_AUX_D) | \
> > BIT_ULL(POWER_DOMAIN_INIT))
> > #define CNL_DISPLAY_DC_OFF_POWER_DOMAINS ( \
> > - CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS | \
> > BIT_ULL(POWER_DOMAIN_MODESET) | \
> > BIT_ULL(POWER_DOMAIN_AUX_A) | \
> > - BIT_ULL(POWER_DOMAIN_INIT))
> > + CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS)
> >
> > static const struct i915_power_well_ops i9xx_always_on_power_well_ops = {
> > .sync_hw = i9xx_power_well_sync_hw_noop,
> > --
> > 2.11.0
> >
> > _______________________________________________
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> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
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