On Tue, Dec 19, 2017 at 05:26:53AM +0000, Dhinakaran Pandiyan wrote: > The global variable dev_priv->psr.sink_support is set if an eDP sink > supports PSR. Use this instead of redoing the check with is_edp_psr(). > Combine source and sink support checks into a macro that can be used to > return early from psr_{invalidate, single_frame_update, flush}. > > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_drv.h | 1 + > drivers/gpu/drm/i915/intel_psr.c | 19 ++++--------------- > 2 files changed, 5 insertions(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index 30f791f89d64..48676e99316e 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -1760,6 +1760,7 @@ static inline void intel_backlight_device_unregister(struct intel_connector *con > > > /* intel_psr.c */ > +#define CAN_PSR(dev_priv) (HAS_PSR(dev_priv) && dev_priv->psr.sink_support) not sure about the "CAN"... but I don't have better suggestion and I believe it is somehow clear enough... > void intel_psr_enable(struct intel_dp *intel_dp, > const struct intel_crtc_state *crtc_state); > void intel_psr_disable(struct intel_dp *intel_dp, > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > index c4d75e82a1df..76339cf387cb 100644 > --- a/drivers/gpu/drm/i915/intel_psr.c > +++ b/drivers/gpu/drm/i915/intel_psr.c > @@ -56,14 +56,6 @@ > #include "intel_drv.h" > #include "i915_drv.h" > > -static bool is_edp_psr(struct intel_dp *intel_dp) > -{ > - if (!intel_dp_is_edp(intel_dp)) > - return false; > - > - return intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED; > -} I wonder why we haven't done this before in favor of sink_support/// my bad... > - > static bool vlv_is_psr_active_on_pipe(struct drm_device *dev, int pipe) > { > struct drm_i915_private *dev_priv = to_i915(dev); > @@ -358,10 +350,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, > &crtc_state->base.adjusted_mode; > int psr_setup_time; > > - if (!HAS_PSR(dev_priv)) > - return; > - > - if (!is_edp_psr(intel_dp)) > + if (!CAN_PSR(dev_priv)) > return; > > if (!i915_modparams.enable_psr) { > @@ -794,7 +783,7 @@ void intel_psr_single_frame_update(struct drm_i915_private *dev_priv, > enum pipe pipe; > u32 val; > > - if (!HAS_PSR(dev_priv)) > + if (!CAN_PSR(dev_priv)) > return; > > /* > @@ -843,7 +832,7 @@ void intel_psr_invalidate(struct drm_i915_private *dev_priv, > struct drm_crtc *crtc; > enum pipe pipe; > > - if (!HAS_PSR(dev_priv)) > + if (!CAN_PSR(dev_priv)) > return; > > mutex_lock(&dev_priv->psr.lock); > @@ -883,7 +872,7 @@ void intel_psr_flush(struct drm_i915_private *dev_priv, > struct drm_crtc *crtc; > enum pipe pipe; > > - if (!HAS_PSR(dev_priv)) > + if (!CAN_PSR(dev_priv)) > return; Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > > mutex_lock(&dev_priv->psr.lock); > -- > 2.11.0 > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx