v2: Test each shared context is its own timeline and allows request
reordering between shared contexts.
Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx>
Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx>
Cc: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx>
---
include/drm-uapi/sync_file.h | 98 +++++++
tests/Makefile.sources | 1 +
tests/gem_ctx_shared.c | 684 +++++++++++++++++++++++++++++++++++++++++++
3 files changed, 783 insertions(+)
create mode 100644 include/drm-uapi/sync_file.h
create mode 100644 tests/gem_ctx_shared.c
diff --git a/include/drm-uapi/sync_file.h b/include/drm-uapi/sync_file.h
new file mode 100644
index 000000000..b4f2db009
--- /dev/null
+++ b/include/drm-uapi/sync_file.h
@@ -0,0 +1,98 @@
+/* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */
+/*
+ * Copyright (C) 2012 Google, Inc.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_SYNC_H
+#define _LINUX_SYNC_H
+
+#include <linux/ioctl.h>
+#include <linux/types.h>
+
+/**
+ * struct sync_merge_data - data passed to merge ioctl
+ * @name: name of new fence
+ * @fd2: file descriptor of second fence
+ * @fence: returns the fd of the new fence to userspace
+ * @flags: merge_data flags
+ * @pad: padding for 64-bit alignment, should always be zero
+ */
+struct sync_merge_data {
+ char name[32];
+ __s32 fd2;
+ __s32 fence;
+ __u32 flags;
+ __u32 pad;
+};
+
+/**
+ * struct sync_fence_info - detailed fence information
+ * @obj_name: name of parent sync_timeline
+* @driver_name: name of driver implementing the parent
+* @status: status of the fence 0:active 1:signaled <0:error
+ * @flags: fence_info flags
+ * @timestamp_ns: timestamp of status change in nanoseconds
+ */
+struct sync_fence_info {
+ char obj_name[32];
+ char driver_name[32];
+ __s32 status;
+ __u32 flags;
+ __u64 timestamp_ns;
+};
+
+/**
+ * struct sync_file_info - data returned from fence info ioctl
+ * @name: name of fence
+ * @status: status of fence. 1: signaled 0:active <0:error
+ * @flags: sync_file_info flags
+ * @num_fences number of fences in the sync_file
+ * @pad: padding for 64-bit alignment, should always be zero
+ * @sync_fence_info: pointer to array of structs sync_fence_info with all
+ * fences in the sync_file
+ */
+struct sync_file_info {
+ char name[32];
+ __s32 status;
+ __u32 flags;
+ __u32 num_fences;
+ __u32 pad;
+
+ __u64 sync_fence_info;
+};
+
+#define SYNC_IOC_MAGIC '>'
+
+/**
+ * Opcodes 0, 1 and 2 were burned during a API change to avoid users of the
+ * old API to get weird errors when trying to handling sync_files. The API
+ * change happened during the de-stage of the Sync Framework when there was
+ * no upstream users available.
+ */
+
+/**
+ * DOC: SYNC_IOC_MERGE - merge two fences
+ *
+ * Takes a struct sync_merge_data. Creates a new fence containing copies of
+ * the sync_pts in both the calling fd and sync_merge_data.fd2. Returns the
+ * new fence's fd in sync_merge_data.fence
+ */
+#define SYNC_IOC_MERGE _IOWR(SYNC_IOC_MAGIC, 3, struct sync_merge_data)
+
+/**
+ * DOC: SYNC_IOC_FILE_INFO - get detailed information on a sync_file
+ *
+ * Takes a struct sync_file_info. If num_fences is 0, the field is updated
+ * with the actual number of fences. If num_fences is > 0, the system will
+ * use the pointer provided on sync_fence_info to return up to num_fences of
+ * struct sync_fence_info, with detailed fence information.
+ */
+#define SYNC_IOC_FILE_INFO _IOWR(SYNC_IOC_MAGIC, 4, struct sync_file_info)
+
+#endif /* _LINUX_SYNC_H */
diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index e4e06d01d..48b3f4625 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -58,6 +58,7 @@ TESTS_progs = \
gem_ctx_create \
gem_ctx_exec \
gem_ctx_param \
+ gem_ctx_shared \
gem_ctx_switch \
gem_ctx_thrash \
gem_double_irq_loop \
diff --git a/tests/gem_ctx_shared.c b/tests/gem_ctx_shared.c
new file mode 100644
index 000000000..7bc285d79
--- /dev/null
+++ b/tests/gem_ctx_shared.c
@@ -0,0 +1,684 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include "igt.h"
+
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include <fcntl.h>
+#include <inttypes.h>
+#include <errno.h>
+#include <sys/stat.h>
+#include <sys/ioctl.h>
+#include <sys/time.h>
+
+#include <drm.h>
+
+#include "igt_rand.h"
+#include "igt_vgem.h"
+#include "sync_file.h"
+
+#define LO 0
+#define HI 1
+#define NOISE 2
+
+#define MAX_PRIO LOCAL_I915_CONTEXT_MAX_USER_PRIORITY
+#define MIN_PRIO LOCAL_I915_CONTEXT_MIN_USER_PRIORITY
+
+#define BUSY_QLEN 8
+#define MAX_ELSP_QLEN 16
+
+IGT_TEST_DESCRIPTION("Test shared contexts.");
+
+struct local_i915_gem_context_create_v2 {
+ uint32_t ctx_id;
+ uint32_t flags;
+#define I915_GEM_CONTEXT_SHARE_GTT 0x1
+ uint32_t share_ctx;
+ uint32_t pad;
+};
+
+#define LOCAL_IOCTL_I915_GEM_CONTEXT_CREATE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE, struct local_i915_gem_context_create_v2)
+
+static int
+__gem_context_create_shared(int i915, uint32_t share, unsigned int flags,
+ uint32_t *out)
+{
+ struct local_i915_gem_context_create_v2 arg = {
+ .flags = flags,
+ .share_ctx = share,
+ };
+ int err = 0;
+
+ if (igt_ioctl(i915, LOCAL_IOCTL_I915_GEM_CONTEXT_CREATE, &arg))
+ err = -errno;
+
+ *out = arg.ctx_id;
+
+ errno = 0;
+ return err;
+}
+
+static uint32_t
+gem_context_create_shared(int i915, uint32_t share, unsigned int flags)
+{
+ uint32_t ctx;
+
+ igt_assert_eq(__gem_context_create_shared(i915, share, flags, &ctx), 0);
+
+ return ctx;
+}
+
+static uint32_t
+gem_queue_create(int i915)
+{
+ return gem_context_create_shared(i915, 0, I915_GEM_CONTEXT_SHARE_GTT);
+}
+
+static void create_shared_gtt(int i915, unsigned int flags)
+#define DETACHED 0x1
+{
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ struct drm_i915_gem_exec_object2 obj = {
+ .handle = gem_create(i915, 4096),
+ };
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(&obj),
+ .buffer_count = 1,
+ };
+ uint32_t parent, child;
+
+ gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
+ gem_execbuf(i915, &execbuf);
+ gem_sync(i915, obj.handle);
+
+ child = flags & DETACHED ? gem_context_create(i915) : 0;
+ igt_until_timeout(2) {
+ parent = flags & DETACHED ? child : 0;
+ child = gem_context_create_shared(i915, parent,
+ I915_GEM_CONTEXT_SHARE_GTT);
+ execbuf.rsvd1 = child;
+ gem_execbuf(i915, &execbuf);
+
+ if (flags & DETACHED) {
+ gem_context_destroy(i915, parent);
+ gem_execbuf(i915, &execbuf);
+ } else {
+ parent = child;
+ gem_context_destroy(i915, parent);
+ }
+
+ execbuf.rsvd1 = parent;
+ igt_assert_eq(__gem_execbuf(i915, &execbuf), -ENOENT);
+ igt_assert_eq(__gem_context_create_shared(i915, parent,
+ I915_GEM_CONTEXT_SHARE_GTT,
+ &parent), -ENOENT);
+ }
+ if (flags & DETACHED)
+ gem_context_destroy(i915, child);
+
+ gem_sync(i915, obj.handle);
+ gem_close(i915, obj.handle);
+}
+
+static void disjoint_timelines(int i915)
+{
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ struct drm_i915_gem_exec_object2 obj = {
+ .handle = gem_create(i915, 4096),
+ };
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(&obj),
+ .buffer_count = 1,
+ };
+ struct sync_fence_info parent, child;
+ struct sync_file_info sync_file_info = {
+ .num_fences = 1,
+ };
+
+ /*
+ * Each context, although they share a vm, are expected to be
+ * distinct timelines. A request queued to one context should be
+ * independent of any shared contexts.
+ *
+ * This information is exposed via the sync_file->name which
+ * includes the fence.context.
+ */
+
+ gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
+ gem_execbuf(i915, &execbuf);
+ gem_sync(i915, obj.handle);
+
+ execbuf.flags = I915_EXEC_FENCE_OUT;
+ gem_execbuf_wr(i915, &execbuf);
+ sync_file_info.sync_fence_info = to_user_pointer(&parent);
+ do_ioctl(execbuf.rsvd2 >> 32, SYNC_IOC_FILE_INFO, &sync_file_info);
+ close(execbuf.rsvd2 >> 32);
+
+ execbuf.rsvd1 =
+ gem_context_create_shared(i915, 0, I915_GEM_CONTEXT_SHARE_GTT);
+ gem_execbuf_wr(i915, &execbuf);
+ sync_file_info.sync_fence_info = to_user_pointer(&child);
+ do_ioctl(execbuf.rsvd2 >> 32, SYNC_IOC_FILE_INFO, &sync_file_info);
+ close(execbuf.rsvd2 >> 32);
+ gem_context_destroy(i915, execbuf.rsvd1);
+
+ igt_info("Parent fence: %s %s\n", parent.driver_name, parent.obj_name);
+ igt_info("Child fence: %s %s\n", child.driver_name, child.obj_name);
+
+ /* Driver should be the same, but on different timelines */
+ igt_assert(strcmp(parent.driver_name, child.driver_name) == 0);
+ igt_assert(strcmp(parent.obj_name, child.obj_name) != 0);
+
+ gem_sync(i915, obj.handle);
+ gem_close(i915, obj.handle);
+}
+
+static int reopen_driver(int fd)
+{
+ char path[256];
+
+ snprintf(path, sizeof(path), "/proc/self/fd/%d", fd);
+ fd = open(path, O_RDWR);
+ igt_assert_lte(0, fd);
+
+ return fd;
+}
+
+static void exhaust_shared_gtt(int i915, unsigned int flags)
+#define EXHAUST_LRC 0x1
+{
+ i915 = reopen_driver(i915);
+
+ igt_fork(pid, 1) {
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ struct drm_i915_gem_exec_object2 obj = {
+ .handle = gem_create(i915, 4096)
+ };
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(&obj),
+ .buffer_count = 1,
+ };
+ uint32_t parent, child;
+ unsigned long count = 0;
+ int err;
+
+ gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
+
+ child = 0;
+ for (;;) {
+ parent = child;
+ err = __gem_context_create_shared(i915, parent,
+ I915_GEM_CONTEXT_SHARE_GTT,
+ &child);
+ if (err)
+ break;
+
+ if (flags & EXHAUST_LRC) {
+ execbuf.rsvd1 = child;
+ err = __gem_execbuf(i915, &execbuf);
+ if (err)
+ break;
+ }
+
+ count++;
+ }
+ gem_sync(i915, obj.handle);
+
+ igt_info("Created %lu shared contexts, before %d (%s)\n",
+ count, err, strerror(-err));
+ }
+ close(i915);
+ igt_waitchildren();
+}
+
+static void exec_shared_gtt(int i915, unsigned int ring)
+{
+ const int gen = intel_gen(intel_get_drm_devid(i915));
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ struct drm_i915_gem_exec_object2 obj = {
+ .handle = gem_create(i915, 4096)
+ };
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(&obj),
+ .buffer_count = 1,
+ .flags = ring,
+ };
+ uint32_t scratch = obj.handle;
+ uint32_t batch[16];
+ int i;
+
+ gem_require_ring(i915, ring);
+ igt_require(gem_can_store_dword(i915, ring));
+
+ /* Load object into place in the GTT */
+ gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
+ gem_execbuf(i915, &execbuf);
+
+ /* Presume nothing causes an eviction in the meantime */
+
+ obj.handle = gem_create(i915, 4096);
+
+ i = 0;
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ if (gen >= 8) {
+ batch[++i] = obj.offset;
+ batch[++i] = 0;
+ } else if (gen >= 4) {
+ batch[++i] = 0;
+ batch[++i] = obj.offset;
+ } else {
+ batch[i]--;
+ batch[++i] = obj.offset;
+ }
+ batch[++i] = 0xc0ffee;
+ batch[++i] = MI_BATCH_BUFFER_END;
+ gem_write(i915, obj.handle, 0, batch, sizeof(batch));
+
+ obj.offset += 4096; /* make sure we don't cause an eviction! */
+ obj.flags |= EXEC_OBJECT_PINNED;
+ execbuf.rsvd1 = gem_context_create_shared(i915, 0,
+ I915_GEM_CONTEXT_SHARE_GTT);
+ if (gen > 3 && gen < 6)
+ execbuf.flags |= I915_EXEC_SECURE;
+
+ gem_execbuf(i915, &execbuf);
+ gem_context_destroy(i915, execbuf.rsvd1);
+ gem_sync(i915, obj.handle); /* write hazard lies */
+ gem_close(i915, obj.handle);
+
+ gem_read(i915, scratch, 0, batch, sizeof(uint32_t));
+ gem_close(i915, scratch);
+
+ igt_assert_eq_u32(*batch, 0xc0ffee);
+}
+
+static void store_dword(int i915, uint32_t ctx, unsigned ring,
+ uint32_t target, uint32_t offset, uint32_t value,
+ uint32_t cork, unsigned write_domain)
+{
+ const int gen = intel_gen(intel_get_drm_devid(i915));
+ struct drm_i915_gem_exec_object2 obj[3];
+ struct drm_i915_gem_relocation_entry reloc;
+ struct drm_i915_gem_execbuffer2 execbuf;
+ uint32_t batch[16];
+ int i;
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer(obj + !cork);
+ execbuf.buffer_count = 2 + !!cork;
+ execbuf.flags = ring;
+ if (gen < 6)
+ execbuf.flags |= I915_EXEC_SECURE;
+ execbuf.rsvd1 = ctx;
+
+ memset(obj, 0, sizeof(obj));
+ obj[0].handle = cork;
+ obj[1].handle = target;
+ obj[2].handle = gem_create(i915, 4096);
+
+ memset(&reloc, 0, sizeof(reloc));
+ reloc.target_handle = obj[1].handle;
+ reloc.presumed_offset = 0;
+ reloc.offset = sizeof(uint32_t);
+ reloc.delta = offset;
+ reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
+ reloc.write_domain = write_domain;
+ obj[2].relocs_ptr = to_user_pointer(&reloc);
+ obj[2].relocation_count = 1;
+
+ i = 0;
+ batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+ if (gen >= 8) {
+ batch[++i] = offset;
+ batch[++i] = 0;
+ } else if (gen >= 4) {
+ batch[++i] = 0;
+ batch[++i] = offset;
+ reloc.offset += sizeof(uint32_t);
+ } else {
+ batch[i]--;
+ batch[++i] = offset;
+ }
+ batch[++i] = value;
+ batch[++i] = MI_BATCH_BUFFER_END;
+ gem_write(i915, obj[2].handle, 0, batch, sizeof(batch));
+ gem_execbuf(i915, &execbuf);
+ gem_close(i915, obj[2].handle);
+}
+
+struct cork {
+ int device;
+ uint32_t handle;
+ uint32_t fence;
+};
+
+static void plug(int i915, struct cork *c)
+{
+ struct vgem_bo bo;
+ int dmabuf;
+
+ c->device = drm_open_driver(DRIVER_VGEM);
+
+ bo.width = bo.height = 1;
+ bo.bpp = 4;
+ vgem_create(c->device, &bo);
+ c->fence = vgem_fence_attach(c->device, &bo, VGEM_FENCE_WRITE);
+
+ dmabuf = prime_handle_to_fd(c->device, bo.handle);
+ c->handle = prime_fd_to_handle(i915, dmabuf);
+ close(dmabuf);
+}
+
+static void unplug(struct cork *c)
+{
+ vgem_fence_signal(c->device, c->fence);
+ close(c->device);
+}
+
+static uint32_t create_highest_priority(int i915)
+{
+ uint32_t ctx = gem_context_create(i915);
+
+ /*
+ * If there is no priority support, all contexts will have equal
+ * priority (and therefore the max user priority), so no context
+ * can overtake us, and we effectively can form a plug.
+ */
+ __gem_context_set_priority(i915, ctx, MAX_PRIO);
+
+ return ctx;
+}
+
+static void unplug_show_queue(int i915, struct cork *c, unsigned int engine)
+{
+ igt_spin_t *spin[BUSY_QLEN];
+
+ for (int n = 0; n < ARRAY_SIZE(spin); n++) {
+ uint32_t ctx = create_highest_priority(i915);
+ spin[n] = __igt_spin_batch_new(i915, ctx, engine, 0);
+ gem_context_destroy(i915, ctx);
+ }
+
+ unplug(c); /* batches will now be queued on the engine */
+ igt_debugfs_dump(i915, "i915_engine_info");
+
+ for (int n = 0; n < ARRAY_SIZE(spin); n++)
+ igt_spin_batch_free(i915, spin[n]);
+}
+
+static void reorder(int i915, unsigned ring, unsigned flags)
+#define EQUAL 1
+{
+ struct cork cork;
+ uint32_t scratch;
+ uint32_t *ptr;
+ uint32_t ctx[2];
+
+ ctx[LO] = gem_queue_create(i915);
+ gem_context_set_priority(i915, ctx[LO], MIN_PRIO);
+
+ ctx[HI] = gem_queue_create(i915);
+ gem_context_set_priority(i915, ctx[HI], flags & EQUAL ? MIN_PRIO : 0);
+
+ scratch = gem_create(i915, 4096);
+ plug(i915, &cork);
+
+ /* We expect the high priority context to be executed first, and
+ * so the final result will be value from the low priority context.
+ */
+ store_dword(i915, ctx[LO], ring, scratch, 0, ctx[LO], cork.handle, 0);
+ store_dword(i915, ctx[HI], ring, scratch, 0, ctx[HI], cork.handle, 0);
+
+ unplug_show_queue(i915, &cork, ring);
+
+ gem_context_destroy(i915, ctx[LO]);
+ gem_context_destroy(i915, ctx[HI]);
+
+ ptr = gem_mmap__gtt(i915, scratch, 4096, PROT_READ);
+ gem_set_domain(i915, scratch, /* no write hazard lies! */
+ I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ gem_close(i915, scratch);
+
+ if (flags & EQUAL) /* equal priority, result will be fifo */
+ igt_assert_eq_u32(ptr[0], ctx[HI]);
+ else
+ igt_assert_eq_u32(ptr[0], ctx[LO]);
+ munmap(ptr, 4096);
+}
+
+static void promotion(int i915, unsigned ring)
+{
+ struct cork cork;
+ uint32_t result, dep;
+ uint32_t *ptr;
+ uint32_t ctx[3];
+
+ ctx[LO] = gem_queue_create(i915);
+ gem_context_set_priority(i915, ctx[LO], MIN_PRIO);
+
+ ctx[HI] = gem_queue_create(i915);
+ gem_context_set_priority(i915, ctx[HI], 0);
+
+ ctx[NOISE] = gem_queue_create(i915);
+ gem_context_set_priority(i915, ctx[NOISE], MIN_PRIO/2);
+
+ result = gem_create(i915, 4096);
+ dep = gem_create(i915, 4096);
+
+ plug(i915, &cork);
+
+ /* Expect that HI promotes LO, so the order will be LO, HI, NOISE.
+ *
+ * fifo would be NOISE, LO, HI.
+ * strict priority would be HI, NOISE, LO
+ */
+ store_dword(i915, ctx[NOISE], ring, result, 0, ctx[NOISE], cork.handle, 0);
+ store_dword(i915, ctx[LO], ring, result, 0, ctx[LO], cork.handle, 0);
+
+ /* link LO <-> HI via a dependency on another buffer */
+ store_dword(i915, ctx[LO], ring, dep, 0, ctx[LO], 0, I915_GEM_DOMAIN_INSTRUCTION);
+ store_dword(i915, ctx[HI], ring, dep, 0, ctx[HI], 0, 0);
+
+ store_dword(i915, ctx[HI], ring, result, 0, ctx[HI], 0, 0);
+
+ unplug_show_queue(i915, &cork, ring);
+
+ gem_context_destroy(i915, ctx[NOISE]);
+ gem_context_destroy(i915, ctx[LO]);
+ gem_context_destroy(i915, ctx[HI]);
+
+ ptr = gem_mmap__gtt(i915, dep, 4096, PROT_READ);
+ gem_set_domain(i915, dep, /* no write hazard lies! */
+ I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ gem_close(i915, dep);
+
+ igt_assert_eq_u32(ptr[0], ctx[HI]);
+ munmap(ptr, 4096);
+
+ ptr = gem_mmap__gtt(i915, result, 4096, PROT_READ);
+ gem_set_domain(i915, result, /* no write hazard lies! */
+ I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ gem_close(i915, result);
+
+ igt_assert_eq_u32(ptr[0], ctx[NOISE]);
+ munmap(ptr, 4096);
+}
+
+static bool ignore_engine(unsigned engine)
+{
+ if (engine == 0)
+ return true;
+
+ if (engine == I915_EXEC_BSD)
+ return true;
+
+ return false;
+}
+
+static void smoketest(int i915, unsigned ring, unsigned timeout)
+{
+ const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
+ unsigned engines[16];
+ unsigned nengine;
+ unsigned engine;
+ uint32_t scratch;
+ uint32_t *ptr;
+
+ nengine = 0;
+ for_each_engine(i915, engine) {
+ if (ignore_engine(engine))
+ continue;
+
+ engines[nengine++] = engine;
+ }
+ igt_require(nengine);
+
+ scratch = gem_create(i915, 4096);
+ igt_fork(child, ncpus) {
+ unsigned long count = 0;
+ uint32_t ctx;
+
+ hars_petruska_f54_1_random_perturb(child);
+
+ ctx = gem_queue_create(i915);
+ igt_until_timeout(timeout) {
+ int prio;
+
+ prio = hars_petruska_f54_1_random_unsafe_max(MAX_PRIO - MIN_PRIO) + MIN_PRIO;
+ gem_context_set_priority(i915, ctx, prio);
+
+ engine = engines[hars_petruska_f54_1_random_unsafe_max(nengine)];
+ store_dword(i915, ctx, engine, scratch,
+ 8*child + 0, ~child,
+ 0, 0);
+ for (unsigned int step = 0; step < 8; step++)
+ store_dword(i915, ctx, engine, scratch,
+ 8*child + 4, count++,
+ 0, 0);
+ }
+ gem_context_destroy(i915, ctx);
+ }
+ igt_waitchildren();
+
+ ptr = gem_mmap__gtt(i915, scratch, 4096, PROT_READ);
+ gem_set_domain(i915, scratch, /* no write hazard lies! */
+ I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ gem_close(i915, scratch);
+
+ for (unsigned n = 0; n < ncpus; n++) {
+ igt_assert_eq_u32(ptr[2*n], ~n);
+ /*
+ * Note this count is approximate due to unconstrained
+ * ordering of the dword writes between engines.
+ *
+ * Take the result with a pinch of salt.
+ */
+ igt_info("Child[%d] completed %u cycles\n", n, ptr[2*n+1]);
+ }
+ munmap(ptr, 4096);
+}
+
+static bool has_share_gtt(int i915)
+{
+ uint32_t ctx;
+
+ __gem_context_create_shared(i915, 0, I915_GEM_CONTEXT_SHARE_GTT, &ctx);
+ if (ctx)
+ gem_context_destroy(i915, ctx);
+
+ return ctx != 0;
+}
+
+igt_main
+{
+ const struct intel_execution_engine *e;
+ int i915;
+
+ igt_fixture {
+ i915 = drm_open_driver(DRIVER_INTEL);
+ igt_require_gem(i915);
+ }
+
+ igt_subtest_group {
+ igt_fixture {
+ igt_require(has_share_gtt(i915));
+ igt_fork_hang_detector(i915);
+ }
+
+ igt_subtest("create-shared-gtt")
+ create_shared_gtt(i915, 0);
+
+ igt_subtest("detached-shared-gtt")
+ create_shared_gtt(i915, DETACHED);
+
+ igt_subtest("disjoint-timelines")
+ disjoint_timelines(i915);
+
+ igt_subtest("exhaust-shared-gtt")
+ exhaust_shared_gtt(i915, 0);
+
+ igt_subtest("exhaust-shared-gtt-lrc")
+ exhaust_shared_gtt(i915, EXHAUST_LRC);
+
+ for (e = intel_execution_engines; e->name; e++) {
+ igt_subtest_f("exec-shared-gtt-%s", e->name)
+ exec_shared_gtt(i915, e->exec_id | e->flags);
+
+ igt_subtest_group {
+ igt_fixture {
+ gem_require_ring(i915, e->exec_id | e->flags);
+ igt_require(gem_can_store_dword(i915, e->exec_id) | e->flags);
+ igt_require(gem_scheduler_enabled(i915));
+ igt_require(gem_scheduler_has_ctx_priority(i915));
+ }
+
+ igt_subtest_f("Q-in-order-%s", e->name)
+ reorder(i915, e->exec_id | e->flags, EQUAL);
+
+ igt_subtest_f("Q-out-order-%s", e->name)
+ reorder(i915, e->exec_id | e->flags, 0);
+
+ igt_subtest_f("Q-promotion-%s", e->name)
+ promotion(i915, e->exec_id | e->flags);
+
+ igt_subtest_f("Q-smoketest-%s", e->name)
+ smoketest(i915, e->exec_id | e->flags, 5);
+ }
+ }
+
+ igt_subtest("Q-smoketest-all") {
+ igt_require(gem_scheduler_enabled(i915));
+ igt_require(gem_scheduler_has_ctx_priority(i915));
+ smoketest(i915, -1, 30);
+ }
+
+ igt_fixture {
+ igt_stop_hang_detector();
+ }
+ }
+}
--
2.15.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
