Em Ter, 2017-12-19 às 11:26 +0000, Chris Wilson escreveu:
> drivers/gpu/drm/i915/intel_ddi.c:2098 intel_ddi_clk_select() warn:
> inconsistent indenting
>
> References: 8edcda1266f9 ("drm/i915: Protect DDI port to DPLL map
> from theoretical race.")
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index f624ba8e23be..f51645a08dca 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2095,7 +2095,7 @@ static void intel_ddi_clk_select(struct
> intel_encoder *encoder,
> if (WARN_ON(!pll))
> return;
>
> - mutex_lock(&dev_priv->dpll_lock);
> + mutex_lock(&dev_priv->dpll_lock);
>
> if (IS_CANNONLAKE(dev_priv)) {
> /* Configure DPCLKA_CFGCR0 to map the DPLL to the
> DDI. */
> @@ -2117,7 +2117,7 @@ static void intel_ddi_clk_select(struct
> intel_encoder *encoder,
> val = I915_READ(DPLL_CTRL2);
>
> val &= ~(DPLL_CTRL2_DDI_CLK_OFF(port) |
> - DPLL_CTRL2_DDI_CLK_SEL_MASK(port));
> + DPLL_CTRL2_DDI_CLK_SEL_MASK(port));
> val |= (DPLL_CTRL2_DDI_CLK_SEL(pll->id, port) |
> DPLL_CTRL2_DDI_SEL_OVERRIDE(port));
>
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