On Fri, 2017-12-08 at 23:37 +0200, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Prevent the DMC from destroying GMBUS transfers on GLK. GMBUS > lives in PG1 so DC off is all we need. > Just so that I understand this correctly. DMC is expected to take care of managing power for GMBUS transfers without the driver explicitly turning on/off the power well 1 but it isn't. Do you know if this is a DMC regression? > Cc: stable@xxxxxxxxxxxxxxx > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 96ab74f3d101..522e0a63090f 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -1792,6 +1792,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, > BIT_ULL(POWER_DOMAIN_GT_IRQ) | \ > BIT_ULL(POWER_DOMAIN_MODESET) | \ > BIT_ULL(POWER_DOMAIN_AUX_A) | \ > + BIT_ULL(POWER_DOMAIN_GMBUS) | \ > BIT_ULL(POWER_DOMAIN_INIT)) > > #define CNL_DISPLAY_POWERWELL_2_POWER_DOMAINS ( \ _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
