Quoting Antonio Argenziano (2017-12-04 23:45:41) > This patch adds a test that will trigger a preemption of a low priority > batch by a 'bad' batch buffer which will hang. The test aims at making > sure that a hanging high priority batch will not disrupt the submission > flow of low priority contexts. > > -v2: > - Rename subtest (Chris) > - Use igt_hang_ctx to hang ring (Chris) > - Add comment on execution order checks (Chris) > > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Michal Winiarski <michal.winiarski@xxxxxxxxx> > Signed-off-by: Antonio Argenziano <antonio.argenziano@xxxxxxxxx> > --- > +static void preemptive_hang(int fd, unsigned ring) > +{ > + igt_spin_t *spin[16]; Someone is going to shout one day, what is it with the magic number 16? #define MAX_ELSP_QLEN 16 ? And should be set to some safe number times the forseeable future. > + igt_hang_t hang; > + uint32_t ctx[2]; > + > + ctx[HI] = gem_context_create(fd); > + gem_context_set_priority(fd, ctx[HI], MAX_PRIO); > + > + for (int n = 0; n < 16; n++) { > + ctx[LO] = gem_context_create(fd); > + gem_context_set_priority(fd, ctx[LO], MIN_PRIO); > + > + spin[n] = __igt_spin_batch_new(fd, ctx[LO], ring, 0); > + igt_debug("spin[%d].handle=%d\n", n, spin[n]->handle); > + > + gem_context_destroy(fd, ctx[LO]); > + } > + > + hang = igt_hang_ctx(fd, ctx[HI], ring, 0, NULL); > + gem_wait(fd, hang.handle, NULL); That should be igt_post_hang_ring(fd, hang); -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx