On Tue, 10 Apr 2012 14:39:49 +0200, Daniel Vetter <daniel.vetter at ffwll.ch> wrote: > Over time we've added more and more workarounds in there for render > core issues, so these register settings will revert back to their > reset state. To avoid making a bad situation worse, re-run the clock > gating code after reset so that we don't crash right away with a known > hw issue. > > Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch> This shouldn't do any harm whilst we do a full modeset afterwards. However, we also need to reset rc6 and contexts. -Chris -- Chris Wilson, Intel Open Source Technology Centre
