Over time we've added more and more workarounds in there for render core issues, so these register settings will revert back to their reset state. To avoid making a bad situation worse, re-run the clock gating code after reset so that we don't crash right away with a known hw issue. Signed-Off-by: Daniel Vetter <daniel.vetter at ffwll.ch> --- drivers/gpu/drm/i915/i915_drv.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 96f8efc..aafb942 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -850,6 +850,9 @@ int i915_reset(struct drm_device *dev, u8 flags) i915_gem_init_ppgtt(dev); + /* Clock gating also touches registers in the GT core. */ + intel_init_clock_gating(dev); + mutex_unlock(&dev->struct_mutex); drm_irq_uninstall(dev); drm_mode_config_reset(dev); -- 1.7.9.1
