On Wed, Nov 29, 2017 at 03:07:03PM -0800, Rodrigo Vivi wrote: > On Wed, Nov 29, 2017 at 06:08:47PM +0000, Ville Syrjala wrote: > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > Reject interlaced modes on VLV/CHV DP outputs. This simply does > > not work correctly in the hardware. We do get some output, but > > it's quite corrupted. > > > > The available documentation fails to mention this fact. I > > contacted some hardware people who eventually managed to locate > > the relevant HSD for VLV, which was resolved by declaring > > interlaced DP output as not supported. The HSD was never cloned > > for CHV even though it inherited most of the hardware and > > thus has the same problems with interlaced DP output. > > > > Cc: Dennis Vshivkov <awesome.walrus+bugzilla@xxxxxxxxx> > > Reported-by: Dennis Vshivkov <awesome.walrus+bugzilla@xxxxxxxxx> > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103922 > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > I'm afraid we won't be able to track that down... > I took a quick look on wa_database for vlv/chv to see if > something seemed related, but nothing ring a bell... > > So, let's live without these modes. > > Acked-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> Thanks. Pushed to dinq. > > > > --- > > drivers/gpu/drm/i915/intel_dp.c | 7 ++++++- > > 1 file changed, 6 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > > index 957735c0b4c6..61cde5cd04d3 100644 > > --- a/drivers/gpu/drm/i915/intel_dp.c > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > @@ -1677,6 +1677,10 @@ intel_dp_compute_config(struct intel_encoder *encoder, > > conn_state->scaling_mode); > > } > > > > + if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && > > + adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) > > + return false; > > + > > if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK) > > return false; > > > > @@ -6083,7 +6087,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, > > drm_connector_init(dev, connector, &intel_dp_connector_funcs, type); > > drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); > > > > - connector->interlace_allowed = true; > > + if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) > > + connector->interlace_allowed = true; > > connector->doublescan_allowed = 0; > > > > intel_dp_init_connector_port_info(intel_dig_port); > > -- > > 2.13.6 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
