On Wed, Nov 29, 2017 at 08:04:31PM +0200, Ville Syrjälä wrote: > On Wed, Nov 29, 2017 at 07:51:37PM +0200, Imre Deak wrote: > > We store a SW state of the t11_t12 timing in 100usec units but have to > > program it in 100msec as required by HW. The rounding used during > > programming means there will be a mismatch between the SW and HW states > > of this value triggering a "PPS state mismatch" error. Avoid this by > > storing the already rounded-up value in the SW state. > > > > Note that we still calculate panel_power_cycle_delay with the finer > > 100usec granularity to avoid any needless waits using that version of > > the delay. > > > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103903 > > Cc: joks <joks@xxxxxxxx> > > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_dp.c | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > > index 957735c0b4c6..27d2529a3416 100644 > > --- a/drivers/gpu/drm/i915/intel_dp.c > > +++ b/drivers/gpu/drm/i915/intel_dp.c > > @@ -5355,6 +5355,12 @@ intel_dp_init_panel_power_sequencer(struct intel_dp *intel_dp) > > */ > > final->t8 = 1; > > final->t9 = 1; > > + > > + /* > > + * HW has only a 100msec granularity for t11_t12 so round it up > > + * accordingly. > > + */ > > + final->t11_t12 = roundup(final->t11_t12, 100 * 10); > > Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > As a micro-optimization I guess we might want to move the division here > as well. But maybe that would cause more confusion since all the other > timings are in 100usec units. Dunno. Yep, had v1 like that with the same dilemma. In any case that could be done separately imo to keep this minimal in case someone wants to backport it. > > > } > > > > static void > > -- > > 2.13.2 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx