Quoting Ville Syrjala (2017-11-29 15:37:31) > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > We should make sure the pipe has fully started when we enable it from > the i830 "power well". Otherwise theoretically i830 could also hit > problems with vblank timestamps jumping around (since we skip the > wait during modeset on i830). Additionally moving planes between the > pipes etc. might not work correctly until both pipes are actually up and > running. > > v2: Less pointless duplication in the code (Chris) > > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> #v1 > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
