On Thu, Nov 23, 2017 at 09:04:48PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> In order to guarantee that pipe_src_w/h matches the user mode h/vdisplay
> we must not adjust pipe_src_w to accommodate double wide/dual link.
> Instead just reject the mode outright.
>
> This will allows us to rely on crtc_state->mode for plane clipping.
>
> Cc: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Might be real good if we have some igt that injects all these kinds of
funny modes, just to check for bugs and stuff (i.e. not encoding any
expectations that any of them work). Or maybe we need a smart fuzzer for
the atomic ioctl for that.
Musings aside, on patches 1&2:
Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_display.c | 15 ++++++++++++---
> 1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index d67c7c498b34..959d21157328 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6332,9 +6332,18 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
> * - LVDS dual channel mode
> * - Double wide pipe
> */
> - if ((intel_crtc_has_type(pipe_config, INTEL_OUTPUT_LVDS) &&
> - intel_is_dual_link_lvds(dev)) || pipe_config->double_wide)
> - pipe_config->pipe_src_w &= ~1;
> + if (pipe_config->pipe_src_w & 1) {
> + if (pipe_config->double_wide) {
> + DRM_DEBUG_KMS("Odd pipe source width not supported with double wide pipe\n");
> + return -EINVAL;
> + }
> +
> + if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_LVDS) &&
> + intel_is_dual_link_lvds(dev)) {
> + DRM_DEBUG_KMS("Odd pipe source width not supported with dual link LVDS\n");
> + return -EINVAL;
> + }
> + }
>
> /* Cantiga+ cannot handle modes with a hsync front porch of 0.
> * WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
> --
> 2.13.6
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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