Quoting Tvrtko Ursulin (2017-11-24 09:52:23) > > On 24/11/2017 09:28, Chris Wilson wrote: > > Quoting Tvrtko Ursulin (2017-11-24 09:11:06) > >> > >> On 23/11/2017 15:03, Chris Wilson wrote: > >>> We have to be careful in our calibration loop, too slow and we timeout, > >>> too fast and we don't emit an interrupt! On fast legacy devices, we > >>> would overflow the calibration calcuation... > >>> > >>> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > >>> Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > >>> --- > >>> - sz = ALIGN(sz, sizeof(uint32_t)); > >>> + sz = calibrate_nop(gem_fd, 1e6 / target); > >>> + gem_quiescent_gpu(gem_fd); > >>> + > >>> + fd = open_pmu(I915_PMU_INTERRUPTS); > >>> + spin = igt_spin_batch_new(gem_fd, 0, 0, 0); > >> > >> What's the spin batch for? > > > > It's just a plug to ensure that the queue of calibrated execs don't start > > executing before we're waiting on them. Instead of doing exec + sync, we > > want to switch to exec[N] + sync. > > Of course, makes sense. > > Only improvement I can think of is to define the target time (1e6) and > poll timeout (2000ms) from a common local variable. Called it test_duration_ms. Thanks, -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx