gem_quiescent_gpu() is supposed to ensure that the HW is idle, and in the process kick the GPU into rc6, so we should not need a long delay afterwards to ensure that we are indeed in rc6. We do however need a small delay in order to be sure that rc6 cycle counter has started and stopped. Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> --- tests/perf_pmu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c index e153aaf3..bcd17a17 100644 --- a/tests/perf_pmu.c +++ b/tests/perf_pmu.c @@ -1021,7 +1021,7 @@ test_rc6(int gem_fd) fd = open_pmu(I915_PMU_RC6_RESIDENCY); gem_quiescent_gpu(gem_fd); - usleep(1e6); + usleep(1e3); /* wait for the rc6 cycle counter to kick in */ /* Go idle and check full RC6. */ prev = pmu_read_single(fd); @@ -1033,6 +1033,7 @@ test_rc6(int gem_fd) /* Wake up device and check no RC6. */ fw = igt_open_forcewake_handle(gem_fd); igt_assert(fw >= 0); + usleep(1e3); /* wait for the rc6 cycle counter to stop ticking */ prev = pmu_read_single(fd); usleep(duration_ns / 1000); -- 2.15.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
