On Fri, Nov 17, 2017 at 01:08:25AM +0000, Radhakrishna Sripada wrote:
> This reverts commit 8f067837c4b713ce2e69be95af7b2a5eb3bd7de8.
>
> HSD says "WA withdrawn. It was causing corruption with some images.
> WA is not strictly necessary since this bug just causes loss of FBC
> compression with some sizes and images, but doesn't break anything."
>
Fixes: 8f067837c4b7 ("drm/i915: Display WA #1133 WaFbcSkipSegments:cnl, glk")
(added when merging)
> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@xxxxxxxxx>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
(post fact since I forgot to add this before hit push when merging :()
But I had reviewed yesterday the spec.
merged to dinq.
Thanks for the patch,
Rodrigo.
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 ---
> drivers/gpu/drm/i915/intel_pm.c | 12 ------------
> 2 files changed, 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 107e2d7c9fba..96c80fa0fcac 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2985,9 +2985,6 @@ enum i915_power_well_id {
> #define ILK_DPFC_CHICKEN _MMIO(0x43224)
> #define ILK_DPFC_DISABLE_DUMMY0 (1<<8)
> #define ILK_DPFC_NUKE_ON_ANY_MODIFICATION (1<<23)
> -#define GLK_SKIP_SEG_EN (1<<12)
> -#define GLK_SKIP_SEG_COUNT_MASK (3<<10)
> -#define GLK_SKIP_SEG_COUNT(x) ((x)<<10)
> #define ILK_FBC_RT_BASE _MMIO(0x2128)
> #define ILK_FBC_RT_VALID (1<<0)
> #define SNB_FBC_FRONT_BUFFER (1<<1)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 8c69ec9eb6ee..4d2a7e4d91a7 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -121,7 +121,6 @@ static void bxt_init_clock_gating(struct drm_i915_private *dev_priv)
>
> static void glk_init_clock_gating(struct drm_i915_private *dev_priv)
> {
> - u32 val;
> gen9_init_clock_gating(dev_priv);
>
> /*
> @@ -141,11 +140,6 @@ static void glk_init_clock_gating(struct drm_i915_private *dev_priv)
> I915_WRITE(CHICKEN_MISC_2, val);
> }
>
> - /* Display WA #1133: WaFbcSkipSegments:glk */
> - val = I915_READ(ILK_DPFC_CHICKEN);
> - val &= ~GLK_SKIP_SEG_COUNT_MASK;
> - val |= GLK_SKIP_SEG_EN | GLK_SKIP_SEG_COUNT(1);
> - I915_WRITE(ILK_DPFC_CHICKEN, val);
> }
>
> static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv)
> @@ -8478,12 +8472,6 @@ static void cnl_init_clock_gating(struct drm_i915_private *dev_priv)
> if (IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_B0))
> val |= SARBUNIT_CLKGATE_DIS;
> I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE, val);
> -
> - /* Display WA #1133: WaFbcSkipSegments:cnl */
> - val = I915_READ(ILK_DPFC_CHICKEN);
> - val &= ~GLK_SKIP_SEG_COUNT_MASK;
> - val |= GLK_SKIP_SEG_EN | GLK_SKIP_SEG_COUNT(1);
> - I915_WRITE(ILK_DPFC_CHICKEN, val);
> }
>
> static void cfl_init_clock_gating(struct drm_i915_private *dev_priv)
> --
> 2.9.3
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
