Quoting Tvrtko Ursulin (2017-11-13 13:09:06) > From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > > To add the knowledge that VCS1 engine does not support HEVC, > we introduce the concept of engine capabilities. These are > flags defined in per-engine class space which can be passed > in during execbuf time. The driver is then able to fail the > execbuf in case of mismatch between the requested capabilities > and the selected target engine. > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 19 +++++++++++++++---- > drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++ > drivers/gpu/drm/i915/intel_ringbuffer.h | 2 ++ > include/uapi/drm/i915_drm.h | 17 ++++++++++++++++- > 4 files changed, 36 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > index 2e7ddd197cc4..f7aabea601b0 100644 > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > @@ -56,9 +56,10 @@ enum { > #define __EXEC_OBJECT_INTERNAL_FLAGS (~0u << 27) /* all of the above */ > #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE) > > -#define __EXEC_HAS_RELOC BIT(31) > -#define __EXEC_VALIDATED BIT(30) > -#define __EXEC_INTERNAL_FLAGS (~0u << 30) > +#define __EXEC_HAS_RELOC BIT(63) You'll have to switch to BIT_ULL() as well. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx