Op 10-11-17 om 20:48 schreef Ville Syrjälä:
> On Fri, Nov 10, 2017 at 12:35:02PM +0100, Maarten Lankhorst wrote:
>> The firmware may have set up the pipe correctly, but the FIFO
>> underrun and CRC interrupts are likely not enabled.
>>
>> This resulted in debugfs_test.read_all_entries failing on haswell,
>> because of a timeout when reading the crc debugfs entry.
>>
>> Solve this by enabling FIFO underrun reporting after the initial
>> fastset, which lets interrupts be generated as expected.
>>
>> Changes since v1:
>> - Always enable CPU FIFO underrun reporting for >GEN2,
>> and handle GEN2 correctly.
>> Changes since v2:
>> - Remove unneeded HAS_DDI, simplify GEN2 case.
>>
>> Testcase: debugfs_test.read_all_entries
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
>> ---
>> drivers/gpu/drm/i915/intel_display.c | 11 +++++++++++
>> 1 file changed, 11 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index 1b75af773ef7..f0dc33fb3390 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -12906,6 +12906,7 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc,
>> static void intel_finish_crtc_commit(struct drm_crtc *crtc,
>> struct drm_crtc_state *old_crtc_state)
>> {
>> + struct drm_i915_private *dev_priv = to_i915(crtc->dev);
>> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>> struct intel_atomic_state *old_intel_state =
>> to_intel_atomic_state(old_crtc_state->state);
>> @@ -12913,6 +12914,16 @@ static void intel_finish_crtc_commit(struct drm_crtc *crtc,
>> intel_atomic_get_new_crtc_state(old_intel_state, intel_crtc);
>>
>> intel_pipe_update_end(new_crtc_state);
>> +
>> + if (new_crtc_state->update_pipe &&
>> + !needs_modeset(&new_crtc_state->base) &&
>> + old_crtc_state->mode.private_flags & I915_MODE_FLAG_INHERITED) {
>> + if (!IS_GEN2(dev_priv))
>> + intel_set_cpu_fifo_underrun_reporting(dev_priv, intel_crtc->pipe, true);
>> +
>> + if (new_crtc_state->has_pch_encoder)
>> + intel_set_pch_fifo_underrun_reporting(dev_priv, intel_crtc->pipe, true);
> Still using the wrong transcoder for HSW/BDW.
Would it be better with a call to intel_crtc_pch_transcoder?
~Maarten
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