Let's try to make sure that all WAs are applied correctly and survive
resumes, resets, etc... (with some help from a companion i-g-t patch).
v2:
- Rebased
- Print display WAs as well (Ville)
v3:
- Grab the forcewake once for everyone, so that all reads are from
the same powercontext (Chris)
v4: Rebase on top of static tables
Signed-off-by: Oscar Mateo <oscar.mateo@xxxxxxxxx>
Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx>
Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
drivers/gpu/drm/i915/i915_debugfs.c | 79 +++++++++++++++++++++++++++++--------
1 file changed, 63 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 12c4330..8a6fef4 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3356,48 +3356,95 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused)
return 0;
}
+static void check_wa_register(struct seq_file *m,
+ const struct i915_wa_reg *wa_reg)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ u32 read;
+ bool ok;
+
+ assert_forcewakes_active(dev_priv, FORCEWAKE_ALL);
+
+ read = I915_READ_FW(wa_reg->addr);
+ ok = (wa_reg->value & wa_reg->mask) == (read & wa_reg->mask);
+ seq_printf(m,
+ "0x%X: 0x%08x, mask: 0x%08x, read: 0x%08x, status: %s, name: %s\n",
+ i915_mmio_reg_offset(wa_reg->addr),
+ wa_reg->value, wa_reg->mask, read,
+ ok ? "OK" : "FAIL", wa_reg->name);
+}
+
+static void check_wa_registers(struct seq_file *m,
+ const struct i915_wa_reg_table *wa_table,
+ uint table_count)
+{
+ int i, j;
+
+ for (i = 0; i < table_count; i++) {
+ const struct i915_wa_reg *wa = wa_table[i].table;
+
+ for (j = 0; j < wa_table[i].count; j++) {
+ if (!wa[j].applied)
+ continue;
+
+ check_wa_register(m, &wa[j]);
+ }
+ }
+}
+
static int i915_wa_registers(struct seq_file *m, void *unused)
{
- struct intel_engine_cs *engine;
struct drm_i915_private *dev_priv = node_to_i915(m->private);
struct drm_device *dev = &dev_priv->drm;
struct i915_workarounds *workarounds = &dev_priv->workarounds;
const struct i915_wa_reg_table *wa_table;
uint table_count;
- enum intel_engine_id id;
int i, j, ret;
- intel_ctx_workarounds_get(dev_priv, &wa_table, &table_count);
-
ret = mutex_lock_interruptible(&dev->struct_mutex);
if (ret)
return ret;
intel_runtime_pm_get(dev_priv);
- seq_printf(m, "Workarounds applied: %d\n", workarounds->ctx_count);
- for_each_engine(engine, dev_priv, id)
- seq_printf(m, "HW whitelist count for %s: %d\n",
- engine->name, workarounds->hw_whitelist_count[id]);
-
+ seq_printf(m, "Context workarounds applied: %d\n",
+ workarounds->ctx_count);
+ intel_ctx_workarounds_get(dev_priv, &wa_table, &table_count);
for (i = 0; i < table_count; i++) {
const struct i915_wa_reg *wa = wa_table[i].table;
for (j = 0; j < wa_table[i].count; j++) {
- u32 read;
- bool ok;
-
if (!wa[j].applied)
continue;
- read = I915_READ(wa[j].addr);
- ok = (wa[j].value & wa[j].mask) == (read & wa[j].mask);
seq_printf(m,
- "0x%X: 0x%08X, mask: 0x%08X, read: 0x%08x, status: %s, name: %s\n",
+ "0x%X: 0x%08X, mask: 0x%08X, name: %s\n",
i915_mmio_reg_offset(wa[j].addr), wa[j].value,
- wa[j].mask, read, ok ? "OK" : "FAIL", wa[j].name);
+ wa[j].mask, wa[j].name);
}
}
+ seq_putc(m, '\n');
+
+ intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
+
+ seq_printf(m, "GT workarounds applied: %d\n", workarounds->gt_count);
+ intel_gt_workarounds_get(dev_priv, &wa_table, &table_count);
+ check_wa_registers(m, wa_table, table_count);
+ seq_putc(m, '\n');
+
+ seq_printf(m, "Display workarounds applied: %d\n",
+ workarounds->disp_count);
+ intel_display_workarounds_get(dev_priv, &wa_table, &table_count);
+ check_wa_registers(m, wa_table, table_count);
+ seq_putc(m, '\n');
+
+ seq_printf(m, "Whitelist workarounds applied: %d\n",
+ workarounds->hw_whitelist_count[RCS]);
+ intel_whitelist_workarounds_get(dev_priv, &wa_table, &table_count);
+ check_wa_registers(m, wa_table, table_count);
+ seq_putc(m, '\n');
+
+ intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
intel_runtime_pm_put(dev_priv);
mutex_unlock(&dev->struct_mutex);
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
