On 02/11/17 16:35, Chris Wilson wrote:
Quoting Lionel Landwerlin (2017-11-02 16:29:48)+/* Query various aspects of the topology of the GPU. Below is a list of the + * currently supported queries. The motivation of this more detailed query + * mechanism is to expose asynmetric properties of the GPU. Starting with CNL, + * slices might have different sizes (for example 3 subslices in slice0 and 2 + * subslices in slice1+). This means we cannot rely on PARAM_SUBSLICE_MASK + * anymore. + * + * When using this parameter, getparam value should point to a structure of + * type drm_i915_topology_t. Call this once with query set to the relevant + * information to be queried and data_size set to 0. The kernel will then set + * params and data_size to the expected length of data[]. The should make sure + * memory is allocated to the right length before making a second getparam + * with data_size already set. The kernel will then populate data[]. The + * meaning of params[] elements is described for each query below. + */ +#define I915_PARAM_TOPOLOGY 51 +typedef struct drm_i915_topology {Oh crumbs. Please join the intel_engine_info_ioctl discussion. As it stands, lets not introduce multiplexing into an already multiplexed getparam ioctl. -Chris
Hey Tvrtko, Is your intel_engine_info ioctl implementation available anywhere? Thanks, - Lionel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
