To their rightful place inside intel_workarounds.c Signed-off-by: Oscar Mateo <oscar.mateo@xxxxxxxxx> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_pm.c | 15 +-------------- drivers/gpu/drm/i915/intel_workarounds.c | 6 ++++++ 2 files changed, 7 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 8b5a83c..ee0e784 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -8417,17 +8417,6 @@ static void gen8_set_l3sqc_credits(struct drm_i915_private *dev_priv, I915_WRITE(GEN7_MISCCPCTL, misccpctl); } -static void skl_init_clock_gating(struct drm_i915_private *dev_priv) -{ - /* WAC6entrylatency:skl */ - I915_WRITE(FBC_LLC_READ_CTRL, I915_READ(FBC_LLC_READ_CTRL) | - FBC_LLC_FULLY_OPEN); - - /* WaFbcNukeOnHostModify:skl */ - I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) | - ILK_DPFC_NUKE_ON_ANY_MODIFICATION); -} - static void bdw_init_clock_gating(struct drm_i915_private *dev_priv) { /* The GTT cache must be disabled if the system is using 2M pages. */ @@ -8878,10 +8867,8 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv) { if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || IS_GEMINILAKE(dev_priv) || IS_KABYLAKE(dev_priv) || - IS_BROXTON(dev_priv)) + IS_BROXTON(dev_priv) || IS_SKYLAKE(dev_priv)) dev_priv->display.init_clock_gating = nop_init_clock_gating; - else if (IS_SKYLAKE(dev_priv)) - dev_priv->display.init_clock_gating = skl_init_clock_gating; else if (IS_BROADWELL(dev_priv)) dev_priv->display.init_clock_gating = bdw_init_clock_gating; else if (IS_CHERRYVIEW(dev_priv)) diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index da82562..71e1858 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -887,6 +887,12 @@ static int skl_display_workarounds_init_early(struct drm_i915_private *dev_priv) /* WaDisableDopClockGating */ DISPLAY_WA_CLR_BIT(GEN7_MISCCPCTL, GEN7_DOP_CLOCK_GATE_ENABLE); + /* WAC6entrylatency:skl */ + DISPLAY_WA_SET_BIT(FBC_LLC_READ_CTRL, FBC_LLC_FULLY_OPEN); + + /* WaFbcNukeOnHostModify:skl */ + DISPLAY_WA_SET_BIT(ILK_DPFC_CHICKEN, ILK_DPFC_NUKE_ON_ANY_MODIFICATION); + return 0; } -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx