On Mon, 30 Oct 2017, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Starting from version 204 VBT can specify the max TMDS clock we are
> allowed to use with HDMI ports. Parse that information and take it
> into account when filtering modes and computing a crtc state.
>
> Also take the opportunity to sort the platform check if ladder
> from new to old.
>
> v2: Add defines for the values into intel_vbt_defs.h (Jani)
> Don't fall back to 0 silently for unknown values (Jani)
> Skip the debug print for the 0 case (Jani)
>
> Cc: Jani Nikula <jani.nikula@xxxxxxxxx>
> Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
Yup
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 2 ++
> drivers/gpu/drm/i915/intel_bios.c | 24 ++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_hdmi.c | 30 ++++++++++++++++++++----------
> drivers/gpu/drm/i915/intel_vbt_defs.h | 4 ++++
> 4 files changed, 50 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c0a716e596ba..4a7325c4189c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1698,6 +1698,8 @@ enum modeset_restore {
> #define DDC_PIN_D 0x06
>
> struct ddi_vbt_port_info {
> + int max_tmds_clock;
> +
> /*
> * This is an index in the HDMI/DVI DDI buffer translation table.
> * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index fd23023df7c1..51108ffc28d1 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1234,6 +1234,30 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
> info->hdmi_level_shift = hdmi_level_shift;
> }
>
> + if (bdb_version >= 204) {
> + int max_tmds_clock;
> +
> + switch (child->hdmi_max_data_rate) {
> + default:
> + MISSING_CASE(child->hdmi_max_data_rate);
> + /* fall through */
> + case HDMI_MAX_DATA_RATE_PLATFORM:
> + max_tmds_clock = 0;
> + break;
> + case HDMI_MAX_DATA_RATE_297:
> + max_tmds_clock = 297000;
> + break;
> + case HDMI_MAX_DATA_RATE_165:
> + max_tmds_clock = 165000;
> + break;
> + }
> +
> + if (max_tmds_clock)
> + DRM_DEBUG_KMS("VBT HDMI max TMDS clock for port %c: %d kHz\n",
> + port_name(port), max_tmds_clock);
> + info->max_tmds_clock = max_tmds_clock;
> + }
> +
> /* Parse the I_boost config for SKL and above */
> if (bdb_version >= 196 && child->iboost) {
> info->dp_boost_level = translate_iboost(child->dp_iboost_level);
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index aa486b8925cf..38fe24565b4d 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -1224,24 +1224,34 @@ static void pch_post_disable_hdmi(struct intel_encoder *encoder,
> intel_disable_hdmi(encoder, old_crtc_state, old_conn_state);
> }
>
> -static int intel_hdmi_source_max_tmds_clock(struct drm_i915_private *dev_priv)
> +static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
> {
> - if (IS_G4X(dev_priv))
> - return 165000;
> - else if (IS_GEMINILAKE(dev_priv))
> - return 594000;
> - else if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
> - return 300000;
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> + const struct ddi_vbt_port_info *info =
> + &dev_priv->vbt.ddi_port_info[encoder->port];
> + int max_tmds_clock;
> +
> + if (IS_GEMINILAKE(dev_priv))
> + max_tmds_clock = 594000;
> + else if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv))
> + max_tmds_clock = 300000;
> + else if (INTEL_GEN(dev_priv) >= 5)
> + max_tmds_clock = 225000;
> else
> - return 225000;
> + max_tmds_clock = 165000;
> +
> + if (info->max_tmds_clock)
> + max_tmds_clock = min(max_tmds_clock, info->max_tmds_clock);
> +
> + return max_tmds_clock;
> }
>
> static int hdmi_port_clock_limit(struct intel_hdmi *hdmi,
> bool respect_downstream_limits,
> bool force_dvi)
> {
> - struct drm_device *dev = intel_hdmi_to_dev(hdmi);
> - int max_tmds_clock = intel_hdmi_source_max_tmds_clock(to_i915(dev));
> + struct intel_encoder *encoder = &hdmi_to_dig_port(hdmi)->base;
> + int max_tmds_clock = intel_hdmi_source_max_tmds_clock(encoder);
>
> if (respect_downstream_limits) {
> struct intel_connector *connector = hdmi->attached_connector;
> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
> index 3c3c421e2e43..e3d7745a9151 100644
> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> @@ -304,6 +304,10 @@ struct bdb_general_features {
> #define DVO_PORT_MIPIC 23 /* 171 */
> #define DVO_PORT_MIPID 24 /* 171 */
>
> +#define HDMI_MAX_DATA_RATE_PLATFORM 0 /* 204 */
> +#define HDMI_MAX_DATA_RATE_297 1 /* 204 */
> +#define HDMI_MAX_DATA_RATE_165 2 /* 204 */
> +
> #define LEGACY_CHILD_DEVICE_CONFIG_SIZE 33
>
> /* DDC Bus DDI Type 155+ */
--
Jani Nikula, Intel Open Source Technology Center
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