On Wed, 25 Oct 2017, Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> wrote: > On Wednesday, October 25, 2017 3:02:12 PM PDT abhay.kumar@xxxxxxxxx wrote: >> From: Abhay Kumar <abhay.kumar@xxxxxxxxx> >> >> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup. >> This result in no audio forever as cdclk is < 96Mhz. Forever... or until next modeset with audio enabled? >> This chagne will ensure CD clock to be twice of BCLK. >> >> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937 >> Signed-off-by: Abhay Kumar <abhay.kumar@xxxxxxxxx> >> --- >> drivers/gpu/drm/i915/intel_cdclk.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c >> b/drivers/gpu/drm/i915/intel_cdclk.c index e8884c2ade98..185a70f0921c >> 100644 >> --- a/drivers/gpu/drm/i915/intel_cdclk.c >> +++ b/drivers/gpu/drm/i915/intel_cdclk.c >> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct >> intel_crtc_state *crtc_state) /* According to BSpec, "The CD clock >> frequency must be at least twice * the frequency of the Azalia BCLK." and >> BCLK is 96 MHz by default. */ >> - if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9) >> + if (INTEL_GEN(dev_priv) >= 9) > > Why should cdclk be increased when audio is not being enabled? Indeed. I can easily imagine a counter-bug reporting excessive cdclk when audio is not enabled. BR, Jani. > >> min_cdclk = max(2 * 96000, min_cdclk); >> >> if (min_cdclk > dev_priv->max_cdclk_freq) { > > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
