On Tue, Oct 24, 2017 at 12:52:06PM +0300, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > New version of the CNL DVFS series. Everything from the previous series > (first 8 patches) are already reviewed. I slapped on two additional patches > that fell out from the review of the first series. > > Entire series available here: > git://github.com/vsyrjala/linux.git dvfs_voltage_6 > > Ville Syrjälä (10): > drm/i915: Clean up some cdclk switch statements > drm/i915: Start tracking voltage level in the cdclk state > drm/i915: Use cdclk_state->voltage on VLV/CHV > drm/i915: Use cdclk_state->voltage on BDW > drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL > drm/i915: Use cdclk_state->voltage on BXT/GLK > drm/i915: Use cdclk_state->voltage on CNL > drm/i915: Adjust system agent voltage on CNL if required by DDI ports > drm/i915: Sanity check cdclk in vlv_set_cdclk() > drm/i915: Perform a central cdclk state sanity check Entire series pushed to dinq. Thanks for the review. > > drivers/gpu/drm/i915/i915_drv.h | 3 + > drivers/gpu/drm/i915/intel_cdclk.c | 377 ++++++++++++++++++++++++-------- > drivers/gpu/drm/i915/intel_ddi.c | 11 + > drivers/gpu/drm/i915/intel_display.c | 22 +- > drivers/gpu/drm/i915/intel_dp_mst.c | 5 + > drivers/gpu/drm/i915/intel_dpll_mgr.c | 16 +- > drivers/gpu/drm/i915/intel_drv.h | 13 +- > drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +- > 8 files changed, 342 insertions(+), 108 deletions(-) > > -- > 2.13.6 -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
