On Thu, Oct 19, 2017 at 05:13:41PM +0200, Maarten Lankhorst wrote: > The watermarks it should calculate against are the old optimal watermarks. > The currently active crtc watermarks are pure fiction, and are invalid in > case of a nonblocking modeset, page flip enabling/disabling planes or any > other reason. > > When the crtc is disabled or during a modeset the intermediate watermarks > don't need to be programmed separately, and could be directly assigned > to the optimal watermarks. > > Changes since v1: > - Use intel_atomic_get_old_crtc_state. (ville) > > Signed-off-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index ea70c720f492..e181dfc36200 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3124,7 +3124,11 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev, > struct intel_crtc_state *newstate) > { > struct intel_pipe_wm *a = &newstate->wm.ilk.intermediate; > - struct intel_pipe_wm *b = &intel_crtc->wm.active.ilk; > + struct intel_atomic_state *intel_state = > + to_intel_atomic_state(newstate->base.state); > + const struct intel_crtc_state *oldstate = > + intel_atomic_get_old_crtc_state(intel_state, intel_crtc); > + const struct intel_pipe_wm *b = &oldstate->wm.ilk.optimal; > int level, max_level = ilk_wm_max_level(to_i915(dev)); > > /* > @@ -3133,6 +3137,9 @@ static int ilk_compute_intermediate_wm(struct drm_device *dev, > * and after the vblank. > */ > *a = newstate->wm.ilk.optimal; > + if (!newstate->base.active || drm_atomic_crtc_needs_modeset(&newstate->base)) > + return 0; > + > a->pipe_enabled |= b->pipe_enabled; > a->sprites_enabled |= b->sprites_enabled; > a->sprites_scaled |= b->sprites_scaled; > -- > 2.14.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Matt Roper Graphics Software Engineer IoTG Platform Enabling & Development Intel Corporation (916) 356-2795 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx