On 10/11/2017 6:38 PM, Mika Kahola wrote:
On Wed, 2017-10-11 at 15:43 +0300, Ville Syrjälä wrote:
On Mon, Oct 09, 2017 at 03:26:07PM +0300, Mika Kahola wrote:
For Cannonlake the number of scalers for each pipe is 2. Let's
increase
the number of scalers for pipe C.
Signed-off-by: Mika Kahola <mika.kahola@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_device_info.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c
b/drivers/gpu/drm/i915/intel_device_info.c
index 875d428..b2ab6cb 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -347,7 +347,10 @@ void intel_device_info_runtime_init(struct
drm_i915_private *dev_priv)
struct intel_device_info *info =
mkwrite_device_info(dev_priv);
enum pipe pipe;
- if (INTEL_GEN(dev_priv) >= 9) {
+ if (IS_CANNONLAKE(dev_priv)) {
GEN >= 10 would be a bit more future proof.
That's true. I actually tried this on trybot but the outcome wasn't
clean. Maybe I just switch back and give CI another go.
Similar patch I submitted in internal (merged).
+ for_each_pipe(dev_priv, pipe)
+ info->num_scalers[pipe] = 2;
+ } else if (INTEL_GEN(dev_priv) >= 9) {
info->num_scalers[PIPE_A] = 2;
info->num_scalers[PIPE_B] = 2;
info->num_scalers[PIPE_C] = 1;
--
2.7.4
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Regards,
Nabendu
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