Starting on CNL we now need to map VBT DDC Pin to BSPec DDC Pin values. Not a direct translation anymore. According to VBT Block 2 (General Bytes Definition) DDC Bus +----------+-----------+--------------------+ | DDI Type | VBT Value | Bspec Mapped Value | +----------+-----------+--------------------+ | DDI-B | 0x1 | 0x1 | | DDI-C | 0x2 | 0x2 | | DDI-D | 0x3 | 0x4 | | DDI-F | 0x4 | 0x3 | +----------+-----------+--------------------+ v2: Move defines to a better place. This is actually CNL_PCH not CNL only. Cc: Jani Nikula <jani.nikula@xxxxxxxxx> Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> Cc: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> Cc: Clinton Taylor <clinton.a.taylor@xxxxxxxxx> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_bios.c | 27 +++++++++++++++++---------- drivers/gpu/drm/i915/intel_vbt_defs.h | 6 ++++++ 2 files changed, 23 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index dc4fad30bf4f..49e333826c2c 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c @@ -1071,6 +1071,19 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv, } } +static u8 cnp_ddc_pin_map(u8 ddc_pin) +{ + switch (ddc_pin) { + case DDC_BUS_DDI_B: return 0x1; + case DDC_BUS_DDI_C: return 0x2; + case DDC_BUS_DDI_D: return 0x4; + case DDC_BUS_DDI_F: return 0x3; + default: + MISSING_CASE(ddc_pin); + return ddc_pin; + } +} + static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, u8 bdb_version) { @@ -1164,16 +1177,10 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); if (is_dvi) { - info->alternate_ddc_pin = ddc_pin; - - /* - * All VBTs that we got so far for B Stepping has this - * information wrong for Port D. So, let's just ignore for now. - */ - if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) && - port == PORT_D) { - info->alternate_ddc_pin = 0; - } + if (HAS_PCH_CNP(dev_priv)) + info->alternate_ddc_pin = cnp_ddc_pin_map(ddc_pin); + else + info->alternate_ddc_pin = ddc_pin; sanitize_ddc_pin(dev_priv, port); } diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h index 7e2a96712d07..e2e9fc601a9e 100644 --- a/drivers/gpu/drm/i915/intel_vbt_defs.h +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h @@ -308,6 +308,12 @@ struct bdb_general_features { #define LEGACY_CHILD_DEVICE_CONFIG_SIZE 33 +/* ddc_pin DDI Type 155+ */ +#define DDC_BUS_DDI_B 0x1 +#define DDC_BUS_DDI_C 0x2 +#define DDC_BUS_DDI_D 0x3 +#define DDC_BUS_DDI_F 0x4 + /* * The child device config, aka the display device data structure, provides a * description of a port and its configuration on the platform. -- 2.13.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx