This patch set enables enables interlaced mode output on the VGA and SDVO connectors of the G35 chipset. History here: https://bugs.freedesktop.org/show_bug.cgi?id=11220 I have tested the changes on an ASUS P5E-VM-HDMI mainboard with VGA and HDMI CRTs attached. The G45 and SB documentation suggests that this will also work on those chipsets. (Wording of the vertical timing registers is near identical). Feedback welcome. Peter Ross (2): drm/i915: specify vertical timings in frame units for interlaced modes (gen4+) drm/i915: allow interlaced mode output on the SDVO connector drivers/gpu/drm/i915/intel_display.c | 8 ++++++++ drivers/gpu/drm/i915/intel_sdvo.c | 2 +- 2 files changed, 9 insertions(+), 1 deletions(-) -- 1.7.5.4 -- Peter (A907 E02F A6E5 0CD2 34CD 20D2 6760 79C5 AC40 DD6B) -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 198 bytes Desc: Digital signature URL: <http://lists.freedesktop.org/archives/intel-gfx/attachments/20120115/042303d1/attachment.pgp>
