Quoting Oscar Mateo (2017-10-13 21:54:05)
> To their rightful place inside intel_workarounds.c
>
> Signed-off-by: Oscar Mateo <oscar.mateo@xxxxxxxxx>
> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> static int cnl_gt_workarounds_init(struct drm_i915_private *dev_priv)
> {
> + /* This is not an Wa. Enable for better image quality */
> + GT_WA_SET_BIT_MASKED(_3D_CHICKEN3,
> + _3D_CHICKEN3_AA_LINE_QUALITY_FIX_ENABLE);
3D_CHICKEN and not part of the context? I presume you checked!
> +
> /* WaDisableI2mCycleOnWRPort:cnl (pre-prod) */
> if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0))
> GT_WA_SET_BIT(GAMT_CHKN_BIT_REG,
> @@ -856,6 +860,27 @@ static int cfl_display_workarounds_init(struct drm_i915_private *dev_priv)
>
> static int cnl_display_workarounds_init(struct drm_i915_private *dev_priv)
> {
> + if (HAS_PCH_CNP(dev_priv)) {
> + /* Wa #1181 */
> + DISPLAY_WA_SET_BIT(SOUTH_DSPCLK_GATE_D,
> + CNP_PWM_CGE_GATING_DISABLE);
> + }
> +
> + /* WaEnableChickenDCPR:cnl */
> + DISPLAY_WA_SET_BIT(GEN8_CHICKEN_DCPR_1, MASK_WAKEMEM);
> +
> + /* WaFbcWakeMemOn:cnl */
> + DISPLAY_WA_SET_BIT(DISP_ARB_CTL, DISP_FBC_MEMORY_WAKE);
> +
> + /* WaSarbUnitClockGatingDisable:cnl (pre-prod) */
> + if (IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_B0))
> + DISPLAY_WA_SET_BIT(SLICE_UNIT_LEVEL_CLKGATE,
> + SARBUNIT_CLKGATE_DIS);
> +
> + /* Display WA #1133: WaFbcSkipSegments:cnl */
> + DISPLAY_WA_SET_FIELD(ILK_DPFC_CHICKEN, GLK_SKIP_SEG_COUNT_MASK,
> + GLK_SKIP_SEG_EN | GLK_SKIP_SEG_COUNT(1));
> +
> return 0;
> }
They all match up, so
Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
