On Thu, 12 Oct 2017, Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> wrote:
> On Thu, Oct 12, 2017 at 09:30:36PM +0000, James Ausmus wrote:
>> Rename DP_AUX_CH_CTL_TIME_OUT_1600us to DP_AUX_CH_CTL_TIME_OUT_MAX, as
>> the meaning of the (3 << 26) value varies per platform, but it's always the
>> maximum timeout for that platform. Pre-CNL it means 1600us, and for CNL
>> it means 3200us.
>>
>> v2:
>> -Split in to two patches (Rodrigo)
>>
>> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
>> Signed-off-by: James Ausmus <james.ausmus@xxxxxxxxx>
>
> you could've added the rv-b already: ;)
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
Pushed both as the CI results arrived in my time zone, thanks for the
patches and review.
BR,
Jani.
>
>> ---
>> drivers/gpu/drm/i915/i915_reg.h | 2 +-
>> drivers/gpu/drm/i915/intel_dp.c | 2 +-
>> 2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index d2d0a83c09b6..5f99d4d6291b 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -5242,7 +5242,7 @@ enum {
>> #define DP_AUX_CH_CTL_TIME_OUT_400us (0 << 26)
>> #define DP_AUX_CH_CTL_TIME_OUT_600us (1 << 26)
>> #define DP_AUX_CH_CTL_TIME_OUT_800us (2 << 26)
>> -#define DP_AUX_CH_CTL_TIME_OUT_1600us (3 << 26)
>> +#define DP_AUX_CH_CTL_TIME_OUT_MAX (3 << 26) /* Varies per platform */
>> #define DP_AUX_CH_CTL_TIME_OUT_MASK (3 << 26)
>> #define DP_AUX_CH_CTL_RECEIVE_ERROR (1 << 25)
>> #define DP_AUX_CH_CTL_MESSAGE_SIZE_MASK (0x1f << 20)
>> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
>> index 753404280a19..3f0d37fa833f 100644
>> --- a/drivers/gpu/drm/i915/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/intel_dp.c
>> @@ -1032,7 +1032,7 @@ static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp,
>> DP_AUX_CH_CTL_DONE |
>> (has_aux_irq ? DP_AUX_CH_CTL_INTERRUPT : 0) |
>> DP_AUX_CH_CTL_TIME_OUT_ERROR |
>> - DP_AUX_CH_CTL_TIME_OUT_1600us |
>> + DP_AUX_CH_CTL_TIME_OUT_MAX |
>> DP_AUX_CH_CTL_RECEIVE_ERROR |
>> (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) |
>> DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) |
>> --
>> 2.14.1
>>
--
Jani Nikula, Intel Open Source Technology Center
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