With uC resume now happening in i915_gem_resume we need to enable/install the i915 interrupts first as we were enabling GuC interrupts earlier. Interrupt configuration update by enable_guc_interrupts will take effect with this patch. Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@xxxxxxxxx> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Cc: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx> Cc: Michał Winiarski <michal.winiarski@xxxxxxxxx> Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/i915_drv.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 78aa90c..8ed3e57 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1681,14 +1681,6 @@ static int i915_drm_resume(struct drm_device *dev) intel_csr_ucode_resume(dev_priv); - i915_gem_resume(dev_priv); - - i915_restore_state(dev_priv); - intel_pps_unlock_regs_wa(dev_priv); - intel_opregion_setup(dev_priv); - - intel_init_pch_refclk(dev_priv); - /* * Interrupts have to be enabled before any batches are run. If not the * GPU will hang. i915_gem_init_hw() will initiate batches to @@ -1701,6 +1693,14 @@ static int i915_drm_resume(struct drm_device *dev) */ intel_runtime_pm_enable_interrupts(dev_priv); + i915_gem_resume(dev_priv); + + i915_restore_state(dev_priv); + intel_pps_unlock_regs_wa(dev_priv); + intel_opregion_setup(dev_priv); + + intel_init_pch_refclk(dev_priv); + drm_mode_config_reset(dev); mutex_lock(&dev->struct_mutex); -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
