Quoting Tvrtko Ursulin (2017-10-06 13:23:03) > > On 06/10/2017 12:56, Chris Wilson wrote: > > If two nop's (requests in-flight following a wedged device) complete at > > the same time, the global_seqno value written to the HWSP is undefined > > as the two threads are not serialized. > > > > v2: Use irqsafe spinlock. We expect the callback may be called from > > inside another irq spinlock, so we can't unconditionally restore irqs. > > > > Fixes: ce1135c7de64 ("drm/i915: Complete requests in nop_submit_request") > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> #v1 > > --- > > drivers/gpu/drm/i915/i915_gem.c | 7 ++++++- > > 1 file changed, 6 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > > index ab8c6946fea4..6a6974ed8f74 100644 > > --- a/drivers/gpu/drm/i915/i915_gem.c > > +++ b/drivers/gpu/drm/i915/i915_gem.c > > @@ -3014,10 +3014,15 @@ void i915_gem_reset_finish(struct drm_i915_private *dev_priv) > > > > static void nop_submit_request(struct drm_i915_gem_request *request) > > { > > + unsigned long flags; > > + > > GEM_BUG_ON(!i915_terminally_wedged(&request->i915->gpu_error)); > > dma_fence_set_error(&request->fence, -EIO); > > - i915_gem_request_submit(request); > > + > > + spin_lock_irqsave(&request->engine->timeline->lock, flags); > > + __i915_gem_request_submit(request); > > intel_engine_init_global_seqno(request->engine, request->global_seqno); > > + spin_unlock_irqrestore(&request->engine->timeline->lock, flags); > > } > > > > static void engine_set_wedged(struct intel_engine_cs *engine) > > > > Ooops.. > > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> Thanks for asking the question that lead to the discovery of the race and then reviewing the results! Pushed, -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx