On Mon, 2 Jan 2012 13:04:37 -0200, Eugeni Dodonov <eugeni at dodonov.net> wrote: > On Thu, Dec 29, 2011 at 23:52, Eric Anholt <eric at anholt.net> wrote: > > > These registers are automatically incremented by the hardware during > > transform feedback to track where the next streamed vertex output > > should go. Unlike the previous generation, which had a packet for > > setting the corresponding registers to a defined value, gen7 only has > > MI_LOAD_REGISTER_IMM to do so. That's a secure packet (since it loads > > an arbitrary register), so we need to do it from the kernel, and it > > needs to be settable atomically with the batchbuffer execution so that > > two clients doing transform feedback don't stomp on each others' > > state. > > > > Instead of building a more complicated interface involcing setting the > > registers to a specific value, just set them to 0 when asked and > > userland can tweak its pointers accordingly. > > diff --git a/drivers/gpu/drm/i915/i915_dma.c > > b/drivers/gpu/drm/i915/i915_dma.c > > index a9ae374..1add685 100644 > > --- a/drivers/gpu/drm/i915/i915_dma.c > > +++ b/drivers/gpu/drm/i915/i915_dma.c > > @@ -781,6 +781,9 @@ static int i915_getparam(struct drm_device *dev, void > > *data, > > case I915_PARAM_HAS_RELAXED_DELTA: > > value = 1; > > break; > > + case I915_PARAM_HAS_GEN7_SOL_RESET: > > + value = 1; > > > > Wouldn't it be better to have: > value = IS_GEN7(dev); > > as it is gen7+-specific item. This way, userspace could check for this > support early, and avoid setting the flag on the batchbuffer in vain on > pre-gen7 architectures. > > Either way, it will work, so: > > Reviewed-by: Eugeni Dodonov <eugeni.dodonov at intel.com> The flag only gets set by userland in the gen7 code, so it wouldn't change anything. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 197 bytes Desc: not available URL: <http://lists.freedesktop.org/archives/intel-gfx/attachments/20120103/1877cc69/attachment.pgp>
