On Thu, Oct 05, 2017 at 01:52:12PM +0300, Jani Nikula wrote:
> Simplify CRTC enable.
>
> v2: Don't forget DSI (Daniel)
>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_ddi.c | 8 ++++++++
> drivers/gpu/drm/i915/intel_display.c | 3 ---
> drivers/gpu/drm/i915/intel_dsi.c | 7 ++++++-
> 3 files changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 511aa60e0176..f1adc2544ab9 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2207,8 +2207,16 @@ static void intel_ddi_pre_enable(struct intel_encoder *encoder,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state *conn_state)
> {
> + struct drm_crtc *crtc = pipe_config->base.crtc;
> + struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> + struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> + int pipe = intel_crtc->pipe;
> int type = encoder->type;
>
> + WARN_ON(intel_crtc->config->has_pch_encoder);
> +
> + intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> +
> if (type == INTEL_OUTPUT_DP || type == INTEL_OUTPUT_EDP) {
> intel_ddi_pre_enable_dp(encoder,
> pipe_config->port_clock,
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 9058cdfb0649..b55944d8149b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5521,9 +5521,6 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
>
> intel_crtc->active = true;
>
> - if (!intel_crtc->config->has_pch_encoder)
> - intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> -
> intel_encoders_pre_enable(crtc, pipe_config, old_state);
>
> if (intel_crtc->config->has_pch_encoder)
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index 20a7b004ffd7..66bbedc5fa01 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -790,14 +790,19 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state *conn_state)
> {
> - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
> + struct drm_crtc *crtc = pipe_config->base.crtc;
> + struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> + struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> + int pipe = intel_crtc->pipe;
> enum port port;
> u32 val;
> bool glk_cold_boot = false;
>
> DRM_DEBUG_KMS("\n");
>
> + intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
> +
> /*
> * The BIOS may leave the PLL in a wonky state where it doesn't
> * lock. It needs to be fully powered down to fix it.
> --
> 2.11.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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