On Tue, Oct 03, 2017 at 04:37:25PM -0700, Manasi Navare wrote:
> For this specific PCI device, the eDP panel requires a higher
> panel power cycle delay of 1300ms where the minimum spec
> requirement of panel power cycle delay is 500ms.
> This fix in combination with correct timestamp at which we get the
> panel power off time fixes the dP AUX CH timeouts seen on various IGT tests.
>
> Fixes: c99a259b4b5192ba ("drm/i915/edp: Add a T12 panel delay quirk to fix
> DP AUX CH timeouts")
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101144,
> https://bugs.freedesktop.org/show_bug.cgi?id=101518
> Cc: Daniel Vetter <daniel.vetter@xxxxxxxx>
> Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
> Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>
> Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx>
I still wondere whether we can't match on something panel-specific from dp
aux, but as long as there's only one this should be ok. If there's more,
matching on dp aux and putting the quirks into drm_dp_helper.c would be
much better I think.
Acked-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 0fd41cd..ca48bce 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -5286,7 +5286,7 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev,
> * seems sufficient to avoid this problem.
> */
> if (dev_priv->quirks & QUIRK_INCREASE_T12_DELAY) {
> - vbt.t11_t12 = max_t(u16, vbt.t11_t12, 900 * 10);
> + vbt.t11_t12 = max_t(u16, vbt.t11_t12, 1300 * 10);
> DRM_DEBUG_KMS("Increasing T12 panel delay as per the quirk to %d\n",
> vbt.t11_t12);
> }
> --
> 2.1.4
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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