According to spec "If voltage is set too low, it will break functionality. If voltage is set too high, it will waste power." So, let's prefer the waste of power instead of breaking functionality. But also the logic of deciding the level on spec tells "Else, use level 2." So, default is actually "2", not "0". v2: Rebase moving it up to avoid some temporary code duplication. Cc: Mika Kahola <mika.kahola@xxxxxxxxx> Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_cdclk.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c index af8411c2a6b9..7e9c4444c844 100644 --- a/drivers/gpu/drm/i915/intel_cdclk.c +++ b/drivers/gpu/drm/i915/intel_cdclk.c @@ -1562,15 +1562,15 @@ static void cnl_set_cdclk(struct drm_i915_private *dev_priv, } switch (cdclk) { - case 528000: - pcu_ack = 2; + case 168000: + pcu_ack = 0; break; case 336000: pcu_ack = 1; break; - case 168000: + case 528000: default: - pcu_ack = 0; + pcu_ack = 2; break; } -- 2.13.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx