On 2 October 2017 at 13:31, Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> wrote: > On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote: >> When SW enables the use of 2M/1G pages, it must disable the GTT cache. >> >> v2: don't disable for Cherryview which doesn't even support 48b PPGTT! >> >> v3: explicitly check that the system does support 2M/1G pages >> >> Signed-off-by: Matthew Auld <matthew.auld@xxxxxxxxx> >> Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> >> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> >> Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> >> Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > > <SNIP> > >> @@ -8483,10 +8483,11 @@ static void bdw_init_clock_gating(struct drm_i915_private *dev_priv) >> >> /* >> * WaGttCachingOffByDefault:bdw >> - * GTT cache may not work with big pages, so if those >> - * are ever enabled GTT cache may need to be disabled. >> + * The GTT cache must be disabled if the system is using 2M/1G pages. >> */ >> - I915_WRITE(HSW_GTT_CACHE_EN, GTT_CACHE_EN_ALL); >> + I915_WRITE(HSW_GTT_CACHE_EN, >> + HAS_PAGE_SIZES(dev_priv, I915_GTT_PAGE_SIZE_2M) ? 0 : >> + GTT_CACHE_EN_ALL); > > Umm, this is mixing a known W/A with decision logic. > > bool can_use_gtt_cache = !HAS_PAGE_SIZES(dev_priv, I915_GTT_PAGE_SIZE_2M); > > /* WaGttCachingOffByDefault:bdw */ > I915_WRITE(HSW_GTT_CACHE_EN, can_use_gtt_cache ? GTT_CACHE_EN_ALL : 0); > > The big question is that if everyone else has GTT caching enabled by > default, should not we actively be disabling it on other code paths? AFAIK it's *disabled* by default, bdw and chv are the only platforms which seek to enable it. I don't know why other platforms don't also follow suit... That WA is literally just: "WA to enable the caching if off by defaultboth at driver init and Resume". > I'm also feeling 'init_clock_gating' is not the best home for the code. > > We can find a new home later, but do separate the decision logic from > the W/A. > > Also, do 1G pages imply 2M page support? It's bit on the theoritical > side of science of course. I just assume not, since it doesn't explicitly state that anywhere. > > Regards, Joonas > -- > Joonas Lahtinen > Open Source Technology Center > Intel Corporation > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
