On Fri, 2017-09-29 at 17:10 +0100, Matthew Auld wrote: > We can't mix 64K and 4K pte's in the same page-table, so for now we > align 64K objects to 2M to avoid any potential mixing. This is > potentially wasteful but in reality shouldn't be too bad since this only > applies to the virtual address space of a 48b PPGTT. > > v2: don't separate logically connected ops > > Suggested-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Signed-off-by: Matthew Auld <matthew.auld@xxxxxxxxx> > Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> <SNIP> > +++ b/drivers/gpu/drm/i915/i915_vma.c > @@ -501,9 +501,18 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags) > if (upper_32_bits(end) && > vma->page_sizes.sg > I915_GTT_PAGE_SIZE) { Here. See below. > u64 page_alignment = > - rounddown_pow_of_two(vma->page_sizes.sg); > + rounddown_pow_of_two(vma->page_sizes.sg | > + I915_GTT_PAGE_SIZE_2M); > > alignment = max(alignment, page_alignment); > + > + /* > + * We can't mix 64K and 4K PTEs in the same page-table (2M > + * block), and so to avoid the ugliness and complexity of > + * coloring we opt for just aligning 64K objects to 2M. > + */ This is about size, the alignment is happening above, I'd lift the comment there. > + if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) > + size = round_up(size, I915_GTT_PAGE_SIZE_2M); > } Reviewed-by: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> Regards, Joonas -- Joonas Lahtinen Open Source Technology Center Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx