On Thu, 2017-09-28 at 16:47 -0700, Michel Thierry wrote: > On 28/09/17 15:40, Oscar Mateo wrote: > > RING_FORCE_TO_NONPRIV registers do not live in the logical context. They are simply > > global privileged MMIO registers that happen to be powercontext saved and restored > > (meaning only they can survive RC6). Therefore, there is absolutely no need to save > > them so that they can be restored everytime we create a new logical context. > > > > Suggested-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Signed-off-by: Oscar Mateo <oscar.mateo@xxxxxxxxx> > > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > > --- > > drivers/gpu/drm/i915/intel_engine_cs.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c > > index a28e2a8..a75f5e8 100644 > > --- a/drivers/gpu/drm/i915/intel_engine_cs.c > > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c > > @@ -845,8 +845,8 @@ static int wa_ring_whitelist_reg(struct intel_engine_cs *engine, > > if (WARN_ON(index >= RING_MAX_NONPRIV_SLOTS)) > > return -EINVAL; > > > > - WA_WRITE(RING_FORCE_TO_NONPRIV(engine->mmio_base, index), > > - i915_mmio_reg_offset(reg)); > > + I915_WRITE(RING_FORCE_TO_NONPRIV(engine->mmio_base, index), > > + i915_mmio_reg_offset(reg)); > > wa->hw_whitelist_count[engine->id]++; > > > > return 0; > > -- > > 1.9.1 > > > > I see RCS_FORCE_TO_NONPRIV in "Render Engine *Power* Context" and not in > the "Register State Context", so > > Acked-by: Michel Thierry <michel.thierry@xxxxxxxxx> You reviewed the spec and the code, so should be Reviewed-by :) Then this could be merged, too. Regards, Joonas -- Joonas Lahtinen Open Source Technology Center Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
