Quoting Imre Deak (2017-09-28 11:06:24) > Only init / reset the display interrupts during power well enabling / > disabling if the i915 interrupts are enabled. So far we did the > init / reset during driver loading / resuming too, where > initialization / enabling of the i915 interrupts happens only at a later > point. This didn't cause a problem due to GEN8_MASTER_IRQ_CONTROL being > cleared, but triggered gen3_assert_iir_is_zero() in GEN8_IRQ_INIT_NDX(). > > References: https://bugs.freedesktop.org/show_bug.cgi?id=102988 > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> Patch makes sense, so Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> There's an irq powerwell! When is it taken? We don't take it for GT as far as I am aware (we should for execlists plus whenever we enable the user interrupt). Should we? -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
