From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
The blit stride is a two's complement 16 bit number, so trying to
use a stride of 32k would in fact give us -32k. Not sure how this
ever worked on anything, but my 945gm sure doesn't like it. The
machine dies pretty much instantly. Let's reduce the blit to use
a 16k stride instead. Also put in the missing bits for a proper
32bpp blit.
Or maybe time to retire this test since we no longer use CS flips?
Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
---
tests/kms_mmio_vs_cs_flip.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/tests/kms_mmio_vs_cs_flip.c b/tests/kms_mmio_vs_cs_flip.c
index fa947d9cd7f4..851f9a66ebbf 100644
--- a/tests/kms_mmio_vs_cs_flip.c
+++ b/tests/kms_mmio_vs_cs_flip.c
@@ -72,12 +72,13 @@ static void exec_blt(data_t *data)
batch = intel_batchbuffer_alloc(data->bufmgr, data->devid);
igt_assert(batch);
- w = 8192;
- h = data->busy_bo->size / (8192 * 4);
+ w = 4096;
+ h = data->busy_bo->size / (4096 * 4);
pitch = w * 4;
for (i = 0; i < 40; i++) {
- BLIT_COPY_BATCH_START(0);
+ BLIT_COPY_BATCH_START(XY_SRC_COPY_BLT_WRITE_ALPHA |
+ XY_SRC_COPY_BLT_WRITE_RGB);
OUT_BATCH((3 << 24) | /* 32 bits */
(0xcc << 16) | /* copy ROP */
pitch);
--
2.13.5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
