On Tue, 19 Sep 2017, Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx> wrote:
> We should discourage developers from modifying modparams.
> Introduce special macro for easier tracking of changes done
> in modparams and enforce its use by defining existing modparams
> members as const. Note that defining whole modparams struct
> as const makes checkpatch unhappy.
Checkpatch is the least of all reasons to not make the modparams struct
const.
We can get away with having some fields (such as device info within
dev_priv) const, even if that's dubious.
IIUC modifying const data is undefined behaviour at best, could cause
subtle bugs through compiler optimizing reads of the data away because
it assumes no modifications, and the data gets placed in rodata at
worst.
I kinda like the union trick in this patch, but IMO we need to double
check what the standard says about it. Making the fellow developers
check the standard is always a bad sign, even if it turns out to be fine
after all.
BR,
Jani.
>
> v2: rebased
>
> Credits-to: Coccinelle
>
> @@
> identifier n;
> expression e;
> @@
> (
> - i915_modparams.n = e;
> + i915_modparams_set(n, e);
> )
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx>
> Cc: Jani Nikula <jani.nikula@xxxxxxxxx>
> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
> Cc: Ville Syrjala <ville.syrjala@xxxxxxxxx>
> Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 12 ++++++------
> drivers/gpu/drm/i915/i915_params.c | 4 ++--
> drivers/gpu/drm/i915/i915_params.h | 7 ++++++-
> drivers/gpu/drm/i915/intel_fbc.c | 2 +-
> drivers/gpu/drm/i915/intel_guc_log.c | 10 +++++-----
> drivers/gpu/drm/i915/intel_gvt.c | 4 ++--
> drivers/gpu/drm/i915/intel_psr.c | 2 +-
> drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
> drivers/gpu/drm/i915/intel_runtime_pm.c | 4 ++--
> drivers/gpu/drm/i915/intel_uc.c | 18 ++++++++++--------
> drivers/gpu/drm/i915/intel_uncore.c | 14 +++++++-------
> 11 files changed, 43 insertions(+), 36 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 7056bb2..99b47c5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1032,9 +1032,9 @@ static void i915_driver_cleanup_mmio(struct drm_i915_private *dev_priv)
>
> static void intel_sanitize_options(struct drm_i915_private *dev_priv)
> {
> - i915_modparams.enable_execlists =
> + i915_modparams_set(enable_execlists,
> intel_sanitize_enable_execlists(dev_priv,
> - i915_modparams.enable_execlists);
> + i915_modparams.enable_execlists));
>
> /*
> * i915.enable_ppgtt is read-only, so do an early pass to validate the
> @@ -1042,13 +1042,13 @@ static void intel_sanitize_options(struct drm_i915_private *dev_priv)
> * do this now so that we can print out any log messages once rather
> * than every time we check intel_enable_ppgtt().
> */
> - i915_modparams.enable_ppgtt =
> + i915_modparams_set(enable_ppgtt,
> intel_sanitize_enable_ppgtt(dev_priv,
> - i915_modparams.enable_ppgtt);
> + i915_modparams.enable_ppgtt));
> DRM_DEBUG_DRIVER("ppgtt mode: %i\n", i915_modparams.enable_ppgtt);
>
> - i915_modparams.semaphores =
> - intel_sanitize_semaphores(dev_priv, i915_modparams.semaphores);
> + i915_modparams_set(semaphores,
> + intel_sanitize_semaphores(dev_priv, i915_modparams.semaphores));
> DRM_DEBUG_DRIVER("use GPU semaphores? %s\n",
> yesno(i915_modparams.semaphores));
>
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index ec65341..2a8fa9b 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -26,10 +26,10 @@
> #include "i915_drv.h"
>
> #define i915_param_named(name, T, perm, desc) \
> - module_param_named(name, i915_modparams.name, T, perm); \
> + module_param_named(name, i915_modparams.name##_writable, T, perm); \
> MODULE_PARM_DESC(name, desc)
> #define i915_param_named_unsafe(name, T, perm, desc) \
> - module_param_named_unsafe(name, i915_modparams.name, T, perm); \
> + module_param_named_unsafe(name, i915_modparams.name##_writable, T, perm); \
> MODULE_PARM_DESC(name, desc)
>
> struct i915_params i915_modparams __read_mostly = {
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index a2cbb47..e7b2845 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -70,7 +70,7 @@
> func(bool, enable_dpcd_backlight); \
> func(bool, enable_gvt)
>
> -#define MEMBER(T, member) T member
> +#define MEMBER(T, member) union { const T member; T member##_writable; }
> struct i915_params {
> I915_PARAMS_FOR_EACH(MEMBER);
> };
> @@ -78,5 +78,10 @@ struct i915_params {
>
> extern struct i915_params i915_modparams __read_mostly;
>
> +#define i915_modparams_set(name, value) \
> +({ \
> + i915_modparams.name##_writable = value; \
> +})
> +
> #endif
>
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
> index 8e3a055..13fa354 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -1355,7 +1355,7 @@ void intel_fbc_init(struct drm_i915_private *dev_priv)
> if (need_fbc_vtd_wa(dev_priv))
> mkwrite_device_info(dev_priv)->has_fbc = false;
>
> - i915_modparams.enable_fbc = intel_sanitize_fbc_option(dev_priv);
> + i915_modparams_set(enable_fbc, intel_sanitize_fbc_option(dev_priv));
> DRM_DEBUG_KMS("Sanitized enable_fbc value: %d\n",
> i915_modparams.enable_fbc);
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_log.c b/drivers/gpu/drm/i915/intel_guc_log.c
> index 6571d96..4876235 100644
> --- a/drivers/gpu/drm/i915/intel_guc_log.c
> +++ b/drivers/gpu/drm/i915/intel_guc_log.c
> @@ -480,7 +480,7 @@ static int guc_log_late_setup(struct intel_guc *guc)
> guc_log_runtime_destroy(guc);
> err:
> /* logging will remain off */
> - i915_modparams.guc_log_level = -1;
> + i915_modparams_set(guc_log_level, -1);
> return ret;
> }
>
> @@ -531,7 +531,7 @@ int intel_guc_log_create(struct intel_guc *guc)
> GEM_BUG_ON(guc->log.vma);
>
> if (i915_modparams.guc_log_level > GUC_LOG_VERBOSITY_MAX)
> - i915_modparams.guc_log_level = GUC_LOG_VERBOSITY_MAX;
> + i915_modparams_set(guc_log_level, GUC_LOG_VERBOSITY_MAX);
>
> /* The first page is to save log buffer state. Allocate one
> * extra page for others in case for overlap */
> @@ -577,7 +577,7 @@ int intel_guc_log_create(struct intel_guc *guc)
> i915_vma_unpin_and_release(&guc->log.vma);
> err:
> /* logging will be off */
> - i915_modparams.guc_log_level = -1;
> + i915_modparams_set(guc_log_level, -1);
> return ret;
> }
>
> @@ -611,7 +611,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val)
> }
>
> if (log_param.logging_enabled) {
> - i915_modparams.guc_log_level = log_param.verbosity;
> + i915_modparams_set(guc_log_level, log_param.verbosity);
>
> /* If log_level was set as -1 at boot time, then the relay channel file
> * wouldn't have been created by now and interrupts also would not have
> @@ -634,7 +634,7 @@ int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val)
> guc_flush_logs(guc);
>
> /* As logging is disabled, update log level to reflect that */
> - i915_modparams.guc_log_level = -1;
> + i915_modparams_set(guc_log_level, -1);
> }
>
> return ret;
> diff --git a/drivers/gpu/drm/i915/intel_gvt.c b/drivers/gpu/drm/i915/intel_gvt.c
> index b4a7f31..2052e3e 100644
> --- a/drivers/gpu/drm/i915/intel_gvt.c
> +++ b/drivers/gpu/drm/i915/intel_gvt.c
> @@ -73,7 +73,7 @@ void intel_gvt_sanitize_options(struct drm_i915_private *dev_priv)
>
> return;
> bail:
> - i915_modparams.enable_gvt = 0;
> + i915_modparams_set(enable_gvt, 0);
> }
>
> /**
> @@ -123,7 +123,7 @@ int intel_gvt_init(struct drm_i915_private *dev_priv)
> return 0;
>
> bail:
> - i915_modparams.enable_gvt = 0;
> + i915_modparams_set(enable_gvt, 0);
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index 0a17d1f..2ec57d4d 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -944,7 +944,7 @@ void intel_psr_init(struct drm_i915_private *dev_priv)
>
> /* Per platform default: all disabled. */
> if (i915_modparams.enable_psr == -1)
> - i915_modparams.enable_psr = 0;
> + i915_modparams_set(enable_psr, 0);
>
> /* Set link_standby x link_off defaults */
> if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 05c08b0..a057d37 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1982,7 +1982,7 @@ static void intel_ring_init_semaphores(struct drm_i915_private *dev_priv,
> i915_gem_object_put(obj);
> err:
> DRM_DEBUG_DRIVER("Failed to allocate space for semaphores, disabling\n");
> - i915_modparams.semaphores = 0;
> + i915_modparams_set(semaphores, 0);
> }
>
> static void intel_ring_init_irq(struct drm_i915_private *dev_priv,
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 7933d1b..05bb62c 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -2471,9 +2471,9 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
> {
> struct i915_power_domains *power_domains = &dev_priv->power_domains;
>
> - i915_modparams.disable_power_well =
> + i915_modparams_set(disable_power_well,
> sanitize_disable_power_well_option(dev_priv,
> - i915_modparams.disable_power_well);
> + i915_modparams.disable_power_well));
> dev_priv->csr.allowed_dc_mask =
> get_allowed_dc_mask(dev_priv, i915_modparams.enable_dc);
>
> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> index 9018540..d91a441 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -67,14 +67,15 @@ void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
> i915_modparams.enable_guc_submission > 0)
> DRM_INFO("Ignoring GuC options, no hardware\n");
>
> - i915_modparams.enable_guc_loading = 0;
> - i915_modparams.enable_guc_submission = 0;
> + i915_modparams_set(enable_guc_loading, 0);
> + i915_modparams_set(enable_guc_submission, 0);
> return;
> }
>
> /* A negative value means "use platform default" */
> if (i915_modparams.enable_guc_loading < 0)
> - i915_modparams.enable_guc_loading = HAS_GUC_UCODE(dev_priv);
> + i915_modparams_set(enable_guc_loading,
> + HAS_GUC_UCODE(dev_priv));
>
> /* Verify firmware version */
> if (i915_modparams.enable_guc_loading) {
> @@ -82,16 +83,17 @@ void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
> intel_huc_select_fw(&dev_priv->huc);
>
> if (intel_guc_select_fw(&dev_priv->guc))
> - i915_modparams.enable_guc_loading = 0;
> + i915_modparams_set(enable_guc_loading, 0);
> }
>
> /* Can't enable guc submission without guc loaded */
> if (!i915_modparams.enable_guc_loading)
> - i915_modparams.enable_guc_submission = 0;
> + i915_modparams_set(enable_guc_submission, 0);
>
> /* A negative value means "use platform default" */
> if (i915_modparams.enable_guc_submission < 0)
> - i915_modparams.enable_guc_submission = HAS_GUC_SCHED(dev_priv);
> + i915_modparams_set(enable_guc_submission,
> + HAS_GUC_SCHED(dev_priv));
> }
>
> static void gen8_guc_raise_irq(struct intel_guc *guc)
> @@ -430,11 +432,11 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv)
> ret = 0;
>
> if (i915_modparams.enable_guc_submission) {
> - i915_modparams.enable_guc_submission = 0;
> + i915_modparams_set(enable_guc_submission, 0);
> DRM_NOTE("Falling back from GuC submission to execlist mode\n");
> }
>
> - i915_modparams.enable_guc_loading = 0;
> + i915_modparams_set(enable_guc_loading, 0);
> DRM_NOTE("GuC firmware loading disabled\n");
>
> return ret;
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index 79bbffa..20359a8 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -436,8 +436,8 @@ void intel_uncore_resume_early(struct drm_i915_private *dev_priv)
>
> void intel_uncore_sanitize(struct drm_i915_private *dev_priv)
> {
> - i915_modparams.enable_rc6 =
> - sanitize_rc6_option(dev_priv, i915_modparams.enable_rc6);
> + i915_modparams_set(enable_rc6,
> + sanitize_rc6_option(dev_priv, i915_modparams.enable_rc6));
>
> /* BIOS often leaves RC6 enabled, but disable it for hw init */
> intel_sanitize_gt_powersave(dev_priv);
> @@ -511,7 +511,7 @@ void intel_uncore_forcewake_user_get(struct drm_i915_private *dev_priv)
> i915_modparams.mmio_debug;
>
> dev_priv->uncore.unclaimed_mmio_check = 0;
> - i915_modparams.mmio_debug = 0;
> + i915_modparams_set(mmio_debug, 0);
> }
> spin_unlock_irq(&dev_priv->uncore.lock);
> }
> @@ -533,8 +533,8 @@ void intel_uncore_forcewake_user_put(struct drm_i915_private *dev_priv)
>
> dev_priv->uncore.unclaimed_mmio_check =
> dev_priv->uncore.user_forcewake.saved_mmio_check;
> - i915_modparams.mmio_debug =
> - dev_priv->uncore.user_forcewake.saved_mmio_debug;
> + i915_modparams_set(mmio_debug,
> + dev_priv->uncore.user_forcewake.saved_mmio_debug);
>
> intel_uncore_forcewake_put__locked(dev_priv, FORCEWAKE_ALL);
> }
> @@ -843,7 +843,7 @@ __unclaimed_reg_debug(struct drm_i915_private *dev_priv,
> read ? "read from" : "write to",
> i915_mmio_reg_offset(reg)))
> /* Only report the first N failures */
> - i915_modparams.mmio_debug--;
> + i915_modparams_set(mmio_debug, i915_modparams.mmio_debug - 1);
> }
>
> static inline void
> @@ -1801,7 +1801,7 @@ intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv)
> DRM_DEBUG("Unclaimed register detected, "
> "enabling oneshot unclaimed register reporting. "
> "Please use i915.mmio_debug=N for more information.\n");
> - i915_modparams.mmio_debug++;
> + i915_modparams_set(mmio_debug, i915_modparams.mmio_debug + 1);
> dev_priv->uncore.unclaimed_mmio_check--;
> return true;
> }
--
Jani Nikula, Intel Open Source Technology Center
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