From: Tom O'Rourke <Tom.O'Rourke@xxxxxxxxx> Adds debugfs hooks for enabling/disabling each SLPC task. The enable/disable debugfs files are i915_slpc_gtperf, i915_slpc_balancer, and i915_slpc_dcc. Each of these can take the values: "default", "enabled", or "disabled" v1: update for SLPC v2015.2.4 dfps and turbo merged and renamed "gtperf" ibc split out and renamed "balancer" Avoid magic numbers (Jon Bloomfield) v2-v3: Rebase. v5: Moved slpc_enable_disable_set and slpc_enable_disable_get to intel_slpc.c. s/slpc_enable_disable_get/intel_slpc_task_status and s/slpc_enable_disable_set/intel_slpc_task_control. Prepared separate functions to update the task status only in the SLPC shared memory. Passing dev_priv as parameter. v6: Rebase. s/slpc_param_show|write/slpc_task_param_show|write. Moved functions to intel_slpc.c. RPM Get/Put added before setting parameters and sending RESET event explicitly. (Sagar) Signed-off-by: Tom O'Rourke <Tom.O'Rourke@xxxxxxxxx> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_debugfs.c | 3 + drivers/gpu/drm/i915/intel_slpc.c | 184 ++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_slpc.h | 3 + 3 files changed, 190 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 0a04f3d..e6fd63f 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -4942,6 +4942,9 @@ static int i915_hpd_storm_ctl_open(struct inode *inode, struct file *file) const struct file_operations *fops; } i915_debugfs_files[] = { {"i915_wedged", &i915_wedged_fops}, + {"i915_slpc_gtperf", &i915_slpc_gtperf_fops}, + {"i915_slpc_balancer", &i915_slpc_balancer_fops}, + {"i915_slpc_dcc", &i915_slpc_dcc_fops}, {"i915_max_freq", &i915_max_freq_fops}, {"i915_min_freq", &i915_min_freq_fops}, {"i915_cache_sharing", &i915_cache_sharing_fops}, diff --git a/drivers/gpu/drm/i915/intel_slpc.c b/drivers/gpu/drm/i915/intel_slpc.c index 0c094f0..512d88b 100644 --- a/drivers/gpu/drm/i915/intel_slpc.c +++ b/drivers/gpu/drm/i915/intel_slpc.c @@ -842,3 +842,187 @@ static ssize_t slpc_param_ctl_write(struct file *file, const char __user *ubuf, .release = single_release, .write = slpc_param_ctl_write }; + +static void slpc_task_param_show(struct seq_file *m, u32 enable_id, + u32 disable_id) +{ + struct drm_i915_private *dev_priv = m->private; + const char *status; + u64 val; + int ret; + + ret = intel_slpc_task_status(&dev_priv->guc.slpc, &val, + enable_id, disable_id); + + if (ret) { + seq_printf(m, "error %d\n", ret); + } else { + switch (val) { + case SLPC_PARAM_TASK_DEFAULT: + status = "default\n"; + break; + + case SLPC_PARAM_TASK_ENABLED: + status = "enabled\n"; + break; + + case SLPC_PARAM_TASK_DISABLED: + status = "disabled\n"; + break; + + default: + status = "unknown\n"; + break; + } + + seq_puts(m, status); + } +} + +static int slpc_task_param_write(struct seq_file *m, const char __user *ubuf, + size_t len, u32 enable_id, u32 disable_id) +{ + struct drm_i915_private *dev_priv = m->private; + u64 val; + int ret = 0; + char buf[10]; + + if (len >= sizeof(buf)) + ret = -EINVAL; + else if (copy_from_user(buf, ubuf, len)) + ret = -EFAULT; + else + buf[len] = '\0'; + + if (!ret) { + if (!strncmp(buf, "default", 7)) + val = SLPC_PARAM_TASK_DEFAULT; + else if (!strncmp(buf, "enabled", 7)) + val = SLPC_PARAM_TASK_ENABLED; + else if (!strncmp(buf, "disabled", 8)) + val = SLPC_PARAM_TASK_DISABLED; + else + ret = -EINVAL; + } + + if (!ret) + ret = intel_slpc_task_control(&dev_priv->guc.slpc, val, + enable_id, disable_id); + + return ret; +} + +static int slpc_gtperf_show(struct seq_file *m, void *data) +{ + slpc_task_param_show(m, SLPC_PARAM_TASK_ENABLE_GTPERF, + SLPC_PARAM_TASK_DISABLE_GTPERF); + + return 0; +} + +static int slpc_gtperf_open(struct inode *inode, struct file *file) +{ + struct drm_i915_private *dev_priv = inode->i_private; + + return single_open(file, slpc_gtperf_show, dev_priv); +} + +static ssize_t slpc_gtperf_write(struct file *file, const char __user *ubuf, + size_t len, loff_t *offp) +{ + struct seq_file *m = file->private_data; + int ret = 0; + + ret = slpc_task_param_write(m, ubuf, len, SLPC_PARAM_TASK_ENABLE_GTPERF, + SLPC_PARAM_TASK_DISABLE_GTPERF); + if (ret) + return ret; + + return len; +} + +const struct file_operations i915_slpc_gtperf_fops = { + .owner = THIS_MODULE, + .open = slpc_gtperf_open, + .release = single_release, + .read = seq_read, + .write = slpc_gtperf_write, + .llseek = seq_lseek +}; + +static int slpc_balancer_show(struct seq_file *m, void *data) +{ + slpc_task_param_show(m, SLPC_PARAM_TASK_ENABLE_BALANCER, + SLPC_PARAM_TASK_DISABLE_BALANCER); + + return 0; +} + +static int slpc_balancer_open(struct inode *inode, struct file *file) +{ + struct drm_i915_private *dev_priv = inode->i_private; + + return single_open(file, slpc_balancer_show, dev_priv); +} + +static ssize_t slpc_balancer_write(struct file *file, const char __user *ubuf, + size_t len, loff_t *offp) +{ + struct seq_file *m = file->private_data; + int ret = 0; + + ret = slpc_task_param_write(m, ubuf, len, + SLPC_PARAM_TASK_ENABLE_BALANCER, + SLPC_PARAM_TASK_DISABLE_BALANCER); + if (ret) + return ret; + + return len; +} + +const struct file_operations i915_slpc_balancer_fops = { + .owner = THIS_MODULE, + .open = slpc_balancer_open, + .release = single_release, + .read = seq_read, + .write = slpc_balancer_write, + .llseek = seq_lseek +}; + +static int slpc_dcc_show(struct seq_file *m, void *data) +{ + slpc_task_param_show(m, SLPC_PARAM_TASK_ENABLE_DCC, + SLPC_PARAM_TASK_DISABLE_DCC); + + return 0; +} + +static int slpc_dcc_open(struct inode *inode, struct file *file) +{ + struct drm_i915_private *dev_priv = inode->i_private; + + return single_open(file, slpc_dcc_show, dev_priv); +} + +static ssize_t slpc_dcc_write(struct file *file, const char __user *ubuf, + size_t len, loff_t *offp) +{ + struct seq_file *m = file->private_data; + int ret = 0; + + ret = slpc_task_param_write(m, ubuf, len, SLPC_PARAM_TASK_ENABLE_DCC, + SLPC_PARAM_TASK_DISABLE_DCC); + if (ret) + return ret; + + return len; +} + +const struct file_operations i915_slpc_dcc_fops = { + .owner = THIS_MODULE, + .open = slpc_dcc_open, + .release = single_release, + .read = seq_read, + .write = slpc_dcc_write, + .llseek = seq_lseek +}; diff --git a/drivers/gpu/drm/i915/intel_slpc.h b/drivers/gpu/drm/i915/intel_slpc.h index e49c513..6006bf5 100644 --- a/drivers/gpu/drm/i915/intel_slpc.h +++ b/drivers/gpu/drm/i915/intel_slpc.h @@ -256,6 +256,9 @@ struct slpc_param { #define SLPC_PARAM_TASK_UNKNOWN 3 extern const struct file_operations i915_slpc_param_ctl_fops; +extern const struct file_operations i915_slpc_gtperf_fops; +extern const struct file_operations i915_slpc_balancer_fops; +extern const struct file_operations i915_slpc_dcc_fops; /* intel_slpc.c */ void intel_slpc_set_param(struct intel_slpc *slpc, u32 id, u32 value); -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx