On 18/09/2017 17:27, Chris Wilson wrote:
If preemption occurs at precisely the right moment, we may decide that the wait is complete even though the wait's request is no longer executing (having been preempted). We handle this situation by double checking that request following deciding whether the wait is complete. Reported-by: Michał Winiarski <michal.winiarski@xxxxxxxxx Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Cc: Michał Winiarski <michal.winiarski@xxxxxxxxx> Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_irq.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index bb69c5b0efc4..7a53d94b7e61 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1053,10 +1053,13 @@ static void notify_ring(struct intel_engine_cs *engine) */ if (i915_seqno_passed(intel_engine_get_seqno(engine), wait->seqno)) { + struct drm_i915_gem_request *waiter = wait->request; + wakeup = true; if (!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, - &wait->request->fence.flags)) - rq = i915_gem_request_get(wait->request); + &waiter->fence.flags) && + intel_wait_check_request(wait, waiter)) + rq = i915_gem_request_get(waiter); }if (wakeup)
Hm but as the user interrupt is nor serialized to exelists, what prevents the preemption to happen after the intel_wait_check_request and before dma_fence_signal?
Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
